DS90CF388VJD National Semiconductor, DS90CF388VJD Datasheet - Page 5

• Manufacturer Part Number: DS90CF388VJD
• Description: IC,Serial-to-Parallel Converter,CMOS,TQFP,100PIN
• Manufacturer: National Semiconductor

Specifications of DS90CF388VJD

• Number Of Elements: 8
• Input Type: CMOS/TTL
• Operating Supply Voltage (typ): 3.3V
• Differential Input High Threshold Voltage: 100mV
• Diff. Input Low Threshold Volt: -100mV
• Output Type: Flat Panel Display
• Differential Output Voltage: 450mV
• Operating Temp Range: -10C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP
• Number Of Receivers: 8
• Number Of Drivers: 48
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Not Compliant

LLHT
LHLT
TBIT
TPPOS
TCCS
TSTC
THTC
TJCC
TPLLS
TPDD
TCIT
TCIP
TCIH
TCIL
TXIT
Symbol
CLHT
CHLT
RCOP
RCOH
RCOL
RSRC
RHRC
Symbol
Symbol
Recommended Transmitter Input Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Transmitter Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Receiver Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
TxCLK IN Transition Time (Figure 5)
TxCLK IN Period (Figure 6)
TxCLK in High Time (Figure 6)
TxCLK in Low Time (Figure 6)
TxIN Transition Time
LVDS Low-to-High Transition Time (Figure 3), PRE = 0.75V
(disabled)
LVDS Low-to-High Transition Time (Figure 3), PRE = Vcc (max)
LVDS High-to-Low Transition Time (Figure 3), PRE = 0.75V
(disabled)
LVDS High-to-Low Transition Time (Figure 3), PRE = Vcc (max)
Transmitter Output Bit Width
Transmitter Pulse Positions - Normalized
TxOUT Channel to Channel Skew
TxIN Setup to TxCLK IN (Figure 6)
TxIN Hold to TxCLK IN (Figure 6)
Transmitter Jitter Cycle-to-cycle (Figures
14, 15) (Note 5), DUAL=Vcc
Transmitter Phase Lock Loop Set (Figure 8)
Transmitter Powerdown Delay (Figure 10)
CMOS/TTL Low-to-High Transition Time (Figure 4), Rx data out
CMOS/TTL Low-to-High Transition Time (Figure 4), Rx clock out
CMOS/TTL High-to-Low Transition Time (Figure 4), Rx data out
CMOS/TTL High-to-Low Transition Time (Figure 4), Rx clock out
RxCLK OUT Period (Figure 7)
RxCLK OUT High Time (Figure 7)(Note 4)
RxCLK OUT Low Time (Figure 7)(Note 4)
RxOUT Setup to RxCLK OUT (Figure 7)(Note 4)
RxOUT Hold to RxCLK OUT (Figure 7)(Note 4)
Parameter
Parameter
Parameter
DUAL=Gnd or Vcc
DUAL=1/2Vcc
f = 33 to 70 MHz
f = 70 to 112 MHz
f = 112 MHz
f = 85 MHz
f = 65 MHz
f = 56 MHz
f = 32.5 MHz
DUAL=Gnd or Vcc
DUAL=1/2Vcc
DUAL=Gnd or Vcc
DUAL=1/2Vcc
5
f = 112 MHz
f = 85 MHz
f = 112 MHz
f = 85 MHz
f = 112 MHz
f = 85 MHz
f = 112 MHz
f = 85 MHz
−250
−200
8.928
8.928
0.35T
0.35T
Min
4.75
5.88
Min
2.7
Min
3.5
4.5
3.5
4.5
2.4
3.0
3.4
1.0
1.0
1.5
0
1/7 TCIP
2/7 TCIP
0.14
0.11
0.16
0.11
Typ
1.52
0.5T
0.5T
100
100
Typ
Typ
0.5
1.7
0.5
2.0
1.5
85
60
70
75
0
0
T
T
30.77
15.38
0.65T
0.65T
+250
+200
Max
Max
Max
100
120
110
100
0.7
0.6
0.8
0.7
2.0
1.0
2.0
1.0
3.0
1.7
6.0
75
80
10
25
www.national.com
Units
Units
Units
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
ps
ns
ns
ps
ps
ps
ps
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns