LTC4224IDDB-1#PBF Linear Technology, LTC4224IDDB-1#PBF Datasheet - Page 8

• Manufacturer Part Number: LTC4224IDDB-1#PBF
• Manufacturer: Linear Technology

Specifications of LTC4224IDDB-1#PBF

• Linear Misc Type: Positive Low Voltage
• Package Type: DFN EP
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 6V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Length (mm): 3mm
• Mounting: Surface Mount
• Pin Count: 10
• Lead Free Status / RoHS Status: Compliant

APPLICATIONS INFORMATION
LTC4224-1/LTC4224-2
If the voltage across the sense resistor R1 becomes too
high, the inrush current is limited by the internal current
limit circuitry.
Turn-Off Sequence
The MOSFETs can be turned off by the conditions sum-
marized in Table 1.
Table 1. Turn-Off Conditions
CONDITION
ON1 Goes High
ON2 Goes High
UVLO on V
UVLO on V
UVLO on V
CH1 Overcurrent Fault
CH2 Overcurrent Fault
When ON1 or ON2 is pulled high, the corresponding GATE
pin is pulled to ground by 1.5mA. With the MOSFET off,
the load current discharges the load capacitor. Figure 4
shows V
R
Overcurrent Fault
The LTC4224 features an adjustable current limit with circuit
breaker function that protects external MOSFETs against
short circuits or excessive load current. The voltage across
8
LOAD1
= 4.7Ω discharging C
CC
CC1
CC2
CC1
supply turning off by pulling ON1 high with
CHANNEL 1
Turns Off
No Effect
Turns Off
Turns Off
No Effect
Turns Off
No Effect
FAULT
V
I
OUT
OUT
ON
RESET
RESULT
t
1
LOAD1
10ms DEBOUNCE DELAY
CHANNEL 2
No Effect
Turns Off
Turns Off
No Effect
Turns Off
No Effect
Turns Off
= 150μF .
UVLO on V
UVLO on V
Figure 5. Fault Handling Sequence
CLEARED BY
V
V
V
ON1 High,
ON2 High,
CC1
CC2
ON1 Low
ON2 Low
CC
t
2
BLANKING DELAY
> UVLO
5ms START-UP
> UVLO
> UVLO
I
LIMIT
CC1
CC2
t
3
the external sense resistor is monitored by the active cur-
rent limit (ACL) amplifi er and the electronic circuit breaker
(ECB) comparator. An overcurrent condition results in the
current being limited by the ACL amplifi er. During current
limiting, the ECB is activated and initiates a chain of logic
and timing events to handle the fault.
Figure 5 illustrates the LTC4224’s response to an overcurrent
condition on one supply output. Start-up and overcurrent
control for the two supplies are independent. Before time
point t
the ON pin goes low, a 10ms debounce delay is started.
After 10ms (time point t
on by charging GATE with 10μA. The load capacitor starts
to charge up and the output voltage increases. At the same
IDLE
t
4
2V/DIV
5V/DIV
5V/DIV
GATE1
ECB BLANKING DELAY
V
1
OVERCURRENT 5ms
OUT1
ON1
, the ON pin is high and the part is in reset. When
Figure 4. Normal Power-Down Sequence
I
LIMIT
t
5
5ms ECB Arm
2
), the external MOSFET is turned
0.2ms/DIV
t
422412 F05
6
422412 F04
422412fa