AM41DL1624DT85I Spansion Inc., AM41DL1624DT85I Datasheet - Page 5
AM41DL1624DT85I
Manufacturer Part Number
AM41DL1624DT85I
Description
Manufacturer
Spansion Inc.
Datasheet
1.AM41DL1624DT85I.pdf
(63 pages)
Specifications of AM41DL1624DT85I
Operating Supply Voltage (max)
3.3V
Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
4
Temporary Sector/Sector Block Unprotect ............................. 50
Alternate CE#f Controlled Erase and Program Operations .... 52
SRAM Read Cycle .................................................................. 54
SRAM Write Cycle .................................................................. 56
Figure 22. Data# Polling Timings (During Embedded Algorithms).. 48
Figure 23. Toggle Bit Timings (During Embedded Algorithms)....... 49
Figure 24. DQ2 vs. DQ6.................................................................. 49
Figure 25. Temporary Sector/Sector Block Unprotect
Timing Diagram............................................................................... 50
Figure 26. Sector/Sector Block Protect and Unprotect
Timing Diagram............................................................................... 51
Figure 27. Flash Alternate CE#f Controlled Write (Erase/Program) Op-
eration Timings................................................................................ 53
Figure 28. SRAM Read Cycle—Address Controlled....................... 54
Figure 29. SRAM Read Cycle ......................................................... 55
Figure 30. SRAM Write Cycle—WE# Control ................................. 56
P R E L I M I N A R Y
Am41DL16x4D
Flash Erase And Programming Performance
Flash Latchup Characteristics. . . . . . . . . . . . . . . 59
Package Pin Capacitance . . . . . . . . . . . . . . . . . . 59
FLASH Data Retention . . . . . . . . . . . . . . . . . . . . . 59
SRAM Data Retention . . . . . . . . . . . . . . . . . . . . . 60
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 61
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 62
FLA069—69-Ball Fine-Pitch Grid Array 8 x 11 mm ............... 61
Revision A (October 24, 2001) ............................................... 62
Figure 31. SRAM Write Cycle—CE1#s Control ............................. 57
Figure 32. SRAM Write Cycle—UB#s and LB#s Control ............... 58
Figure 33. CE1#s Controlled Data Retention Mode....................... 60
Figure 34. CE2s Controlled Data Retention Mode......................... 60
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