MT47H128M8HQ-3 L:E TR Micron Technology Inc, MT47H128M8HQ-3 L:E TR Datasheet - Page 125
MT47H128M8HQ-3 L:E TR
Manufacturer Part Number
MT47H128M8HQ-3 L:E TR
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H128M8HQ-3_LE_TR.pdf
(135 pages)
Specifications of MT47H128M8HQ-3 L:E TR
Organization
128Mx8
Density
1Gb
Address Bus
17b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
135mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
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Figure 75: PRECHARGE Command-to-Power-Down Entry
Figure 76: LOAD MODE Command-to-Power-Down Entry
PDF: 09005aef821ae8bf
Rev. O 9/08 EN
Notes:
Note:
Command
Command
Address
Address
1. The earliest precharge power-down entry may occur is at T2, which is 1 ×
1. Valid address for LM command includes MR, EMR, EMR(2), and EMR(3) registers.
2. All banks must be in the precharged state and
3. The earliest precharge power-down entry is at T3, which is after
CK#
CKE
CK#
A10
CKE
CK
PRECHARGE command. Precharge power-down entry occurs prior to
isfied.
CK
Valid
T0
Valid
T0
t RP 2
Valid 1
LM
T1
Single bank
Valid
All banks
125
PRE
T1
vs
1 x
t MRD
t
CK
NOP
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T2
Power-down 1
entry
NOP
T2
1Gb: x4, x8, x16 DDR2 SDRAM
t
Power-down 3
RP met prior to issuing LM command.
entry
NOP
T3
t
CKE (MIN)
T3
Power-Down Mode
© 2004 Micron Technology, Inc. All rights reserved.
t CKE (MIN)
Don’t Care
t
MRD is satisfied.
T4
t
RP (MIN) being sat-
Don’t Care
t
CK after the
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