M28W640HCB70ZB6E NUMONYX, M28W640HCB70ZB6E Datasheet - Page 20

• Manufacturer Part Number: M28W640HCB70ZB6E
• Manufacturer: NUMONYX

Specifications of M28W640HCB70ZB6E

• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 70ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 22b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TFBGA
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 4M
• Supply Current: 18mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Compliant

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Program/Erase Resume command
The Program/Erase Resume command can be used to restart the Program/Erase controller
after a program/erase suspend operation has paused it. One Bus Write cycle is required to
issue the command. Once the command is issued subsequent bus read operations read the
Status Register.
See
Figure 20: Erase Suspend & Resume flowchart and
the Program/Erase Resume command.
Protection Register Program command
The Protection Register Program command is used to program the 128 bit user one-time-
programmable (OTP) segment of the Protection Register. The segment is programmed 16
bits at a time. When shipped all bits in the segment are set to ‘1’. The user can only program
the bits to ‘0’.
Two write cycles are required to issue the Protection Register Program command:
Read operations output the Status Register content after the programming has started.
The segment can be protected by programming bit 1 of the Protection Lock Register (see
Figure 5: Protection register memory
Protection Register will result in a Status Register error. The protection of the Protection
Register is not reversible.
The Protection Register Program cannot be suspended.
Block Lock command
The Block Lock command is used to lock a block and prevent program or erase operations
from changing the data in it. All blocks are locked at power-up or reset.
Two Bus Write cycles are required to issue the Block Lock command:
The lock status can be monitored for each block using the Read Electronic Signature
command.
The Block Lock bits are volatile, once set they remain set until a hardware reset or power-
down/power-up. They are cleared by a Blocks Unlock command. Refer to the section, Block
Locking, for a detailed explanation.
Appendix
The first bus cycle sets up the Protection Register Program command
The second latches the address and the data to be written to the Protection Register
and starts the Program/Erase controller.
The first bus cycle sets up the Block Lock command
The second Bus Write cycle latches the block address.
Table 10
C,
Figure 18: Program Suspend & Resume flowchart and
shows the protection status after issuing a Block Lock command.
map). Attempting to program a previously protected
pseudocode, for flowcharts for using
pseudocode, and