HB28D032MM2 Renesas Electronics America, HB28D032MM2 Datasheet - Page 85
HB28D032MM2
Manufacturer Part Number
HB28D032MM2
Description
Manufacturer
Renesas Electronics America
Datasheet
1.HB28D032MM2.pdf
(90 pages)
Specifications of HB28D032MM2
Lead Free Status / RoHS Status
Compliant
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The access time (t
• T
• T
The synchronous part of the access time is sum of the command frame length and some additional internal
cycles (N
time is T
maximum. The resulting memory access time t
which are required to access a byte of the memory field.
SAD
AAD
CMD
DAT
: The synchronous access time. This time defines the time of the maximum number of cycles
: The asynchronous access time to read a byte out of the memory field.
SAD
t
SAD
AT
Output
= T
= 0.8 µs. The asynchronous access delay of these Hitachi MultiMediaCards is T
Clock
= 16 cycles). At 20 MHz one cycle is 50 ns (1/f
Input
AAD
command frame
+ T
AT
) is divided into two parts:
SAD
: Invalid
Valid data
with
Timing Diagram of Data Input and Output
t
t
OH
IH
t
WH
T
SAD
T
SAD
= N
Access Time
AT
is the sum of both parts:
SAD
/f
t
t
PP
AT
PP
HB28H016/D032/B064/B128MM2
t
T
HL
AAD
PP
), multiplied with N
t
WL
t
ISU
t
OSU
Valid data
response frame
Valid data
Rev.5.0, Jan. 2003, page 83 of 88
t
LH
SAD
data
the resulting frame
V
V
V
V
V
V
AAD
IH
IL
IH
IL
OH
OL
= 300 µs
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