MT45W4MW16BCGB-7013 WT TR Micron Technology Inc, MT45W4MW16BCGB-7013 WT TR Datasheet - Page 32

MT45W4MW16BCGB-7013 WT TR

Manufacturer Part Number
MT45W4MW16BCGB-7013 WT TR
Description
Manufacturer
Micron Technology Inc

Specifications of MT45W4MW16BCGB-7013 WT TR

Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
Table 8:
Deep Power-Down (RCR[4]) Default = DPD Disabled
Page Mode Operation (RCR[7]) Default = Disabled
PDF: 09005aef8247bd51/Source: 09005aef8247bd83
64mb_burst_cr1_5_p25z_133mhz__2.fm - Rev. F 9/07 EN
RCR[2]
0
0
0
0
1
1
1
1
RCR[1]
64Mb Address Patterns for PAR (RCR[4] = 1)
0
0
1
1
0
0
1
1
RCR[0]
0
1
0
1
0
1
0
1
The deep power-down bit enables and disables all refresh-related activity. This mode is
used if the system does not require the storage provided by the CellularRAM device. Any
stored data will become corrupted when DPD is enabled. When refresh activity has been
reenabled, the CellularRAM device will require 150µs to perform an initialization proce-
dure before normal operations can resume.
Deep power-down is enabled by setting RCR[4] = 0 and taking CE# HIGH. DPD can be
enabled using CRE or the software sequence to access the RCR. Taking CE# LOW for at
least 10µs disables DPD and sets RCR[4] = 1; it is not necessary to write to the RCR to
disable DPD. BCR and RCR values (other than RCR[4]) are preserved during DPD.
The page mode operation bit determines whether page mode is enabled for asynchro-
nous READ operations. In the power-up default state, page mode is disabled.
64Mb: 4 Meg x 16 Async/Page/Burst CellularRAM 1.5 Memory
One-quarter of die
One-quarter of die
One-eighth of die
One-eighth of die
Active Section
One-half of die
One-half of die
None of die
Full die
32
000000h–07FFFFh
000000h–3FFFFFh
000000h–1FFFFFh
000000h–0FFFFFh
200000h–3FFFFFh
300000h–3FFFFFh
380000h–3FFFFFh
Address Space
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0
4 Meg x 16
2 Meg x 16
1 Meg x 16
0 Meg x 16
2 Meg x 16
1 Meg x 16
512K x 16
512K x 16
Size
©2005 Micron Technology, Inc. All rights reserved.
Registers
Density
64Mb
32Mb
16Mb
32Mb
16Mb
8Mb
0Mb
8Mb

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