CY7C265-25WC Cypress Semiconductor Corp, CY7C265-25WC Datasheet

CY7C265-25WC

Manufacturer Part Number

CY7C265-25WC

Description

Manufacturer

Cypress Semiconductor Corp

Datasheet

1.CY7C265-25WC.pdf (13 pages)

Specifications of CY7C265-25WC

Density

64Kb

Organization

8Kx8

Access Time (max)

25ns

Operating Current

120mA

Interface Type

Parallel

Package Type

Windowed CDIP

Operating Temperature Classification

Commercial

Operating Supply Voltage (typ)

Operating Temp Range

0C to 70C

Pin Count

Mounting

Through Hole

Operating Supply Voltage (min)

4.5V

Operating Supply Voltage (max)

5.5V

Lead Free Status / RoHS Status

Not Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

CY7C265-25WC

Manufacturer:

CYP

Quantity:

900

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

CY7C265-25WC

Manufacturer:

CYPRESS

Quantity:

900

Current page: 1 of 13
Download datasheet (567Kb)

Cypress Semiconductor Corporation

Document #: 38-04012 Rev. *B

Features

Functional Description

The CY7C265 is a 8192 x 8 registered PROM. It is organized

as 8,192 words by 8 bits wide, and has a pipeline output

initialize byte that may be loaded into the pipeline register with

the initialize signal. The programmable initialize byte is the

8,193rd byte in the PROM and its value is programmed at the

time of use.

Packaged in 28 pins, the PROM has 13 address signals (A

through A

or initialize), and CLOCK.

CLOCK functions as a pipeline clock, loading the contents of

the addressed memory location into the pipeline register on

each rising edge. The data will appear on the outputs if they

• CMOS for optimum speed/power

• High speed (Commercial)

• Low power

• On-chip edge-triggered registers

• EPROM technology

• 5V ±10% V

• Capable of withstanding >2001V static discharge

• Slim 28-pin, 300-mil plastic or hermetic DIP

— 15 ns address set-up

— 12 ns clock to output

— 660 mW (Commercial)

— Ideal for pipelined microprogrammed systems

— 100% programmable

— Reprogrammable (CY7C265W)

), 8 data out signals (O

, commercial and military

through O

•

198 Champion Court

), E/I (enable

are enabled. One pin on the CY7C265 is programmed to

perform either the enable or the initialize function.

If the asynchronous enable (E) is being used, the outputs may

be disabled at any time by switching the enable to a logic

HIGH, and may be returned to the active state by switching the

enable to a logic LOW.

If the synchronous enable (E

go to the OFF or high-impedance state upon the next positive

clock edge after the synchronous enable input is switched to

a HIGH level. If the synchronous enable pin is switched to a

logic LOW, the subsequent positive clock edge will return the

output to the active state. Following a positive clock edge, the

address and synchronous enable inputs are free to change

since no change in the output will occur until the next

LOW-to-HIGH transition of the clock. This unique feature al-

lows the CY7C265 decoders and sense amplifiers to access

the next location while previously addressed data remains sta-

ble on the outputs.

If the E/I pin is used for INIT (asynchronous), then the outputs

are permanently enabled. The initialize function is useful

during power-up and time-out sequences, and can facilitate

implementation of other sophisticated functions such as a

built-in “jump start” address. When activated, the initialize

control input causes the contents of a user programmed

8193rd 8-bit word to be loaded into the on-chip register. Each

bit is programmable and the initialize function can be used to

load any desired combination of 1’s and 0’s into the register.

In the unprogrammed state, activating INIT will generate a

word are programmed to be a 1, activating INIT performs a

Applying a LOW to the INIT input causes an immediate load

of the programmed initialize word into the pipeline register and

onto the outputs. The INIT LOW disables clock and must

return HIGH to enable clock independent of all other inputs,

including the clock.

•

San Jose

8K x 8 Registered PROM

CA 95134-1709

) is being used, the outputs will

Revised August 17, 2006

•

CY7C265

408-943-2600

Related parts for CY7C265-25WC

CY7C265-25WC Summary of contents

Page 1

... Capable of withstanding >2001V static discharge • Slim 28-pin, 300-mil plastic or hermetic DIP Functional Description The CY7C265 is a 8192 x 8 registered PROM organized as 8,192 words by 8 bits wide, and has a pipeline output register. In addition, the device features a programmable initialize byte that may be loaded into the pipeline register with the initialize signal ...

Page 2

... Military Pin Configurations DIP/Flatpack Top View 7C265 GND CLK GND LCC/PLCC (Opaque Only) O Top View GND 7 CLK GND 7C265-40 7C265- 100 120 Ambient Temperature ° ° +70 C ° ° [1] – +125 C CY7C265 E GND GND E GND 21 20 GND Unit ±10% 5V ±10% Page ...

Page 3

... Output Disabled V = Max GND CC OUT V = Max Com’l CC OUT Mil Description Test Conditions T = 25° MHz 5.0V CC CY7C265 7C265-15, 25 7C265-40 7C265-50 Min. Max. Min. Max. Min. Max. Unit 2.4 2.4 2.4 0.4 0.4 0.4 2.0 2.0 2.0 0.8 0.8 –10 +10 –10 +10 – ...

Page 4

... MIL) INCLUDING JIG AND SCOPE (b) High Z Load 250Ω MIL R1 250Ω 167Ω INCLUDING JIG AND SCOPE (d) High Z Load 2.0V [2, 4] 7C265-15 7C265-25 Min. Max. Min CY7C265 3.0V 90% 90% 10% GND ≤ 7C265-40 7C265-50 Max. Min. Max. Min. Max ...

Page 5

... In programming the 7C265 architecture, VPP is applied to pins 3, 9, and 22. The choice of a particular mode depends on the states of the other pins during programming important that the condition of the other pins be met as set forth in the mode table. The considerations that apply with CY7C265 7C265-40 7C265-50 Max. Min. ...

Page 6

... V A – ILP 10 7 Pin Function A A GND CLK PGM CLK GND GND GND ILP ILP IHP ILP IHP ILP ILP ILP ILP ILP ILP ILP IHP ILP ILP CY7C265 – – – – – – – – –A V IHP IHP V A – ...

Page 7

... Document #: 38-04012 Rev. *B Figure 1. Programming Pinout LCC/PLCC (Opaque Only PGM 11 7 CLK VFY programming information, including a listing of software packages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be obtained from any Cypress representative. CY7C265 VFY 1314151617 18 Page ...

Page 8

... OUTPUT VOLTAGE (V) NORMALIZED SUPPLY CURRENT vs. CLOCK PERIOD 1.05 1. 5. 25°C A 0.90 0.85 0.80 0.75 0. CLOCK PERIOD (ns) CY7C265 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 125 0.0 1.0 2.0 3.0 OUTPUT VOLTAGE (V) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING =4.5V ...

Page 9

... Ordering Information Speed I CC (ns) (mA) Ordering Code 15 120 CY7C265-15JC CY7C265-15WC 25 120 CY7C265-25WC 40 100 CY7C265-40PC MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter Document #: 38-04012 Rev. *B Package Name J64 28-Lead Plastic Leaded Chip Carrier W22 28-Lead (300-Mil) Windowed CerDIP W22 28-Lead (300-Mil) Windowed CerDIP ...

Page 10

... Package Diagrams Figure 2. 28-Lead (300-Mil) CerDIP D22 Figure 3. 28-Lead Plastic Leaded Chip Carrier J64 Document #: 38-04012 Rev. *B MIL-STD-1835 D-15 Config. A CY7C265 51-80032-** 51-85001-*A Page ...

Page 11

... LEAD END OPTION (LEAD #1, 14, 15 & 28) DIMENSIONS IN INCHES [MM] MIN. MAX. REFERENCE JEDEC MO-095 PACKAGE WEIGHT: 2.15 gms SEATING PLANE 0.290[7.36] 0.325[8.25] 0.009[0.23] 3° MIN. 0.012[0.30] 0.310[7.87] 0.385[9.78] SEE LEAD END OPTION CY7C265 51-85014-*D Page ...

Page 12

... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. MIL-STD-1835 D-15 Config. A CY7C265 51-80087-** Page ...

Page 13

... Document History Page Document Title: CY7C265 Registered PROM Document Number: 38-04012 Issue REV. ECN NO. Date ** 114139 03/18/02 *A 118896 10/09/02 *B 499562 See ECN Document #: 38-04012 Rev. *B Orig. of Change DSG Changed from Spec number: 38-00084 to 38-04012 GBI Updated ordering information PCI Updated ordering information ...

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