SI8442AB-C-IS Silicon Laboratories Inc, SI8442AB-C-IS Datasheet - Page 23

• Manufacturer Part Number: SI8442AB-C-IS
• Manufacturer: Silicon Laboratories Inc

Specifications of SI8442AB-C-IS

• Operating Supply Voltage (typ): 3.3/5V
• Lead Free Status / RoHS Status: Compliant

3.3. Layout Recommendations
Dielectric isolation is a set of specifications produced by the safety regulatory agencies from around the world that
describes the physical construction of electrical equipment that derives power from a high-voltage power system
such as 100–240 V
specifications places a very high voltage between the input power pins of a product and the user circuits and the
user touchable surfaces of the product. For the IEC relating to products deriving their power from the 100–240 V
power grids, the minimum test voltage is 2500 V
There are two terms described in the safety specifications:


Figure 14 illustrates the accepted method of providing the proper creepage distance along the surface. For a
120 V
application, this distance is 6.4 mm, and a wide-body SOIC package must be used. There must be no copper
traces within this 3.2 or 6.4 mm exclusion area, and the surface should have a conformal coating, such as solder
resist. The digital isolator chip must straddle this exclusion area.
3.3.1. Supply Bypass
The Si844x requires a 1 µF bypass capacitor between V
be placed as close as possible to the package. See "4. Errata and Design Migration Guidelines (Revision C Only)"
on page 25 for more details.
3.3.2. Pin Connections
For narrow-body devices, Pin 2 and Pin 8 GND must be externally connected to respective ground. Pin 9 and Pin
15 must also be connected to external ground. No connect pins are not internally connected. They can be left
floating, tied to VDD, or tied to GND.
3.3.3. Output Pin Termination
The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination
of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving
loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
Creepage—the distance along the insulating surface an arc may travel.
Clearance—the distance through the shortest path through air that an arc may travel.
AC
application, this distance is 3.2 mm, and the narrow-body SOIC package can be used. For a 220–240 V
AC
systems or industrial power systems. The dielectric test (or HIPOT test) given in the safety
Figure 14. Creepage Distance
AC
(or 3750 V
IEC Specified
Creepage
Rev. 1.2
Distance
DD1
and GND1 and V
DC
—the peak equivalent voltage).
DD2
Si8440/41/42/45
and GND2. The capacitor should
AC
AC
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