FDC37C669-MS Standard Microsystems (SMSC), FDC37C669-MS Datasheet - Page 124

• Manufacturer Part Number: FDC37C669-MS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C669-MS

• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

CR05
This register can only be accessed in the Configuration
Mode
CR06
This register can only be accessed in the Configuration
Mode and after the CSR has been initialized
06H.
BIT NO.
0,1
4,3
The default value
2
5
6
7
and
Reserved
FDC DMA Mode
DenSel
Swap Drv 0,1
EXTx4
Reserved
Table 52 - CR05- Floppy Disk and IDE Extended Setup Register
the
BIT NAME
CSR
Read Only. A read returns a 0.
0=(default) Burst mode is enabled for the FDC FIFO execution
phase data transfers. 1=Non-Burst mode enabled. The FDRQ and
FIRQ pins are strobed once for each byte transferred while the FIFO
is enabled.
A high level on this bit, swaps drives and motor sel 0 and 1 of the
FDC. A low level on this bit does not (Default).
External 4 drive support: 0=Internal 2 drive decoder (default).
1=External 4 drive decoder (External 2 to 4 decoder required).
Read Only. A read of this bit returns a 0
has
Bit 4
0
0
1
1
been
to
124
initialized to 05H. The default value after power up is
00H.
of this register after power up is FFH. This register
holds the floppy disk drive types for up to four floppy disk
drives.
DESCRIPTION
Bit 3
0
1
0
1
Densel output
Normal (Default)
Reserved
1
0