USB2524-ABZJ Standard Microsystems (SMSC), USB2524-ABZJ Datasheet - Page 39

• Manufacturer Part Number: USB2524-ABZJ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of USB2524-ABZJ

• Lead Free Status / RoHS Status: Compliant

USB MultiSwitch
Datasheet
SMSC USB2524
7.1.4.64
NUMBER
BIT
7:3
2
1
0
Register FFh: Status/Command (Reset = 0x00)
TM
Hub
USB_ATTACH
INTF_PW_DN
BIT NAME
Reserved
RESET
Reserved. {Note: Software must never write a ‘1’ to these bits}
SMBus Interface Power Down
0 = Interface is active
1 = Interface power down after ACK has completed.
{Note: This bit is write once and is only cleared by assertion of the external
RESET_N pin.}
Reset the SMBus Interface and internal memory back to RESET_N assertion
default settings. {Note: During this reset, this bit is automatically cleared to its
default value of 0.}
0 = Normal Run/Idle State.
1 = Force a reset of the registers to their default state.
If the USB_ATTCH bit is set, then this bit will only reset the non write-protected
registers!
USB Attach (and write protect).
0 = SMBus slave interface is active.
1 = Hub will signal a USB attach event to an upstream device, and the internal
memory (address range 00h-F0h) is “write-protected” to prevent unintentional
data corruption.}
{Note 1: This bit is write once and is only cleared by assertion of the external
RESET_N pin.}
{Note 2: If the SMBus interface is kept active after this bit is set, the
PORT_ASSIGN_12, PORT_ASSIGN_34 PORT_ASSIGN_56,
PORT_ASSIGN_7 and PORT_LOCKOUT registers may be continuously
written to reconfigure port ownership.
DATASHEET
39
DESCRIPTION
Revision 1.91 (08-22-07)