SIO1036-ZG Standard Microsystems (SMSC), SIO1036-ZG Datasheet - Page 3

• Manufacturer Part Number: SIO1036-ZG
• Manufacturer: Standard Microsystems (SMSC)

Specifications of SIO1036-ZG

• Lead Free Status / RoHS Status: Compliant

Super I/O with LPC Interface with FIR and Consumer IR Support
General Description
SMSC SIO1036
PCI_RESET#
CLKRUN#
LFRAME#
SER_IRQ
PCI_CLK
LPCPD#
LDRQ#
LAD0
LAD1
LAD2
LAD3
Vcc Vss
The SMSC SIO1036 is a 3.3V PC 99, PC2001 compliant Super I/O Controller. The SIO1036
implements the LPC interface, a pin reduced ISA interface which provides the same or better
performance as the ISA/X-bus with a substantial savings in pins used. The part also includes 1 GPIO
pin.
The SIO1036 incorporates a Multi-Mode parallel port with ChiProtect™ circuitry plus EPP and ECP
support. The parallel port is compatible with IBM PC/AT architectures, as well as IEEE 1284 EPP and
ECP. The parallel port ChiProtect™ circuitry prevents damage caused by an attached powered printer
when the SIO1036 is not powered.
The SIO1036 offers a full 16-bit internally decoded address bus, a Serial IRQ interface with PCI
CLKRUN# support, relocatable configuration ports, and three DMA channel options.
There is a dedicated Serial Infrared interface UART, which complies with IrDA v1.2 (Fast IR), HPSIR,
and ASKIR formats (used by Sharp and other PDAs), as well as Consumer IR. This can also be used
as a 2 pin UART.
The SIO1036 features Software Configurable Logic (SCL) for ease of use. SCL allows programmable
system configuration of key functions such as the parallel port and UART.
The SIO1036 supports the ISA Plug-and-Play Standard register set (Version 1.0a) and provides the
recommended functionality to support Windows operating systems, PC99, and PC2001. The I/O
Address, DMA Channel, and Hardware IRQ of each device in the SIO1036 may be reprogrammed
through the internal configuration registers. There are multiple I/O address location options, a
Serialized IRQ interface, and three DMA channels.
INTERFACE
LPC BUS
SERIAL
IRQ
CLOCKI
CLOCK
GEN
WDT
Figure 1 SIO1036 Block Diagram
CONFIGURATION
SMI
REGISTERS
PRODUCT PREVIEW
CONTROL, ADDRESS, DATA
3
MULTI-MODE
INTERFACE
2 Pin UART
PARALLEL
INFRARED
PURPOSE
GENERAL
(IrCC 2.0)
PORT
and
I/O
*
Denotes Multifunction Pins
Revision 0.4 (02-05-07)
IRTX, IRMODE*
IRRX, ALT_IRRX*
nSLCTIN, nALF
nINIT, nSTROBE
GPIO*
PD[0:7],
BUSY, SLCT,
PE, nERROR, nACK