SWCHT2000S07 Broadcom, SWCHT2000S07 Datasheet

SWCHT2000S07

Manufacturer Part Number

SWCHT2000S07

Description

Manufacturer

Broadcom

Datasheet

1.SWCHT2000S07.pdf (2 pages)

Specifications of SWCHT2000S07

Lead Free Status / RoHS Status

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•

The HT-2000 (BCM5780) integrates:

• Dual Broadcom

• 17 PCI Express

• Full PCI-X

• Two HyperTransport ports with integrated tunnel

HyperTransport features include:

• 2-GHz (1-GHz, 2X) HyperTransport bus interface

• CRC generation and error checking

• Programmable error checking and handling

• Scalable clock speeds as well as support for reduced bit widths

• 16x HyperTransport transfer rates of 2000 Mbps, 1600 Mbps,

• 8x HyperTransport transfer rates of 1600 Mbps, 1200 Mbps,

• Link disconnect protocol support

• HyperTransport interrupt control and system management support

• HyperTransport I/O link specification, Revision 1.05 compliant

Gigabit Ethernet features include:

• Dual integrated 10/100/1000/BASE-T transceivers

• Dual 10/100/1000 tri-speed, full-duplex/half-duplex MACs

• VLAN tag support (IEEE 802.1q)

• Layer 2 priority encoding (IEEE 802.1p)

• Link aggregation (IEEE 802.3ad)

• Jumbo frame support

• SMBus 2.0 interface

• Broadcom BCM5714 driver compatible

• Universal Management Port (UMP) for server management traffic

• Programmable rules checker for advanced packet filtering and

PCI Express features include:

• Configurable I/O with 17 serial links and four masters

• Recoverable CRC errors with retransmission

• 64-bit addressing support

• Advanced error-detection, error-transmission on destination bus

• Integrated bit-error generator and monitor function

• PCIe V1.0 and 1.0a compliant

PCI-X features include:

• Concurrency between HyperTransport and PCI-X bus

• Eight-deep outbound request queue (HyperTransport to PCI-X)

• Eight-deep HyperTransport to PCI-X memory write posting

• Eight-deep PCI-X to HyperTransport request queue (PCI-X to

• Parity protection on the PCI-X bus

• Integrated PCI-X bus arbitration for up to five PCI-X bus masters

• Up to 133 MHz support

controllers

of 8 bits, 4 bits, and 2 bits

1200 Mbps, 1000 Mbps, 800 Mbps, and 400 Mbps, per wire

1000 Mbps, 800 Mbps, and 400 Mbps, per wire

classification

operating at 2.5 GHz with differential, low-voltage signaling

main memory transactions)

1.0 compliance with up to five bus masters

HT-2000 HyperTransport™ SystemI/O™ Controller

F E A T U R E S

BCM5714 Gigabit Ethernet (GbE) controller

(PCIe™) links with support for up to four

HT-2000

•

• Uni, dual, and quad processor servers

• Workstations

• Server clusters

• Storage systems (NAS)

• SWC-HT2000-S07: PBGA 867LD Leaded

• SWC-HT2000-S07LF: PBGA 867LD Lead-Free

Multiprocessing SystemI/O controller for the HyperTransport-

enabled processors offering integration, performance, reliability,

availability, scalability, and modularity

Integrates all main server I/O interconnects: PCIe, PCI-X, and GbE

Best-in-class 64-bit performance

• HyperTransport-based architecture reduces I/O bottlenecks

• Best-in-class 64-bit and 32-bit performance

Industry proven reliability and availability

• Reusable design methodology used with field-proven

• Designed for 24/7 enterprise computing uptime

• Advanced error detection and correction

• Comprehensive driver suite from BCM57XX product family

Extensive scalability

• HyperTransport multiprocessor architecture allows superior per

• Individual HyperTransport link widths and clock speeds

• Multiple HT-2000 SystemI/O controllers deliver plenty of

Modular architecture

• Modular building blocks allow platform designs that scale

• SystemI/O modularity keeps costs low without sacrificing

• Modular design allows more freedom to differentiate from

The HT-2000 utilizes the HyperTransport interconnect to the

CPU/host bridge to a variety of South Bridge and I/O bridge

solutions. This building block approach enables OEMs to

tailor systems to their applications.

and improves overall system performance

functional blocks

processor scalability compared to similar x86 architectures

easily suit cost/performance targets

bandwidth and I/O slots

from the low-end all the way to high-end

functionality

competition

O R D E R I N G I N F O R M A T I O N

S U M M A R Y O F B E N E F I T S

T A R G E T A P P L I C A T I O N S

Related parts for SWCHT2000S07

SWCHT2000S07 Summary of contents

Page 1

... Layer 2 priority encoding (IEEE 802.1p) • Link aggregation (IEEE 802.3ad) • Jumbo frame support • SMBus 2.0 interface • Broadcom BCM5714 driver compatible • Universal Management Port (UMP) for server management traffic • Programmable rules checker for advanced packet filtering and classification • ...

Page 2

... The PCI-X bus is capable of supporting all modes up to 133 MHz. ® Broadcom , the pulse logo, Connecting everything the trademarks of Broadcom Corporation and/or its affiliates in the United States, certain other countries and/or the EU. Any other trademarks or trade names mentioned are the property of their respective owners. ® BROADCOM CORPORATION ...

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