UPD720122F1-DN2-A Renesas Electronics America, UPD720122F1-DN2-A Datasheet - Page 58
UPD720122F1-DN2-A
Manufacturer Part Number
UPD720122F1-DN2-A
Description
Manufacturer
Renesas Electronics America
Datasheet
1.UPD720122F1-DN2-A.pdf
(86 pages)
Specifications of UPD720122F1-DN2-A
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(2) External local bus 8-bit mode
(a) External local bus 8-bit mode DMA single mode read transfer timing
(Overall)
56
L8T21
L8T22
L8T23
L8T24
L8T25
L8T26
L8T27
L8T28
L8T31
L8T32
L8T33
L8T34
EP1_DACKB
EP1_DRQB
EP1_RDB
LD7 to LD0
EP1_TCB
EP1_STOPB
Symbol
Remarks 1.
DMA request acknowledge setup time (EP1_RDB ↓ )
DMA request off time 1 (EP1_DACKB ↓ )
DMA single mode read transfer cycle time
Read command width
Read command inactive time
Read data delay time (EP1_RDB ↓ )
Buffer direction change time (EP1_RDB ↓ )
Read data hold time (EP1_RDB ↑ )
EP1_STOPB delay time (EP1_RDB ↓ )
EP1_STOPB delay time (EP1_RDB ↑ )
DMA request acknowledge hold time (EP1_RDB ↑ )
Undefined
2.
3.
L8t
Use of EP1_TCB is prohibited in the 8-bit external local bus mode. Clamp this signal to the inactive
status.
LD15 to 8 are undefined in the 8-bit external local bus mode (these signals are invalid when input and
undefined when output).
It is assumed that the external pin capacitance is 15 pF (data bus = 50 pF).
High level
High level
L8t
L8t
21
26
27
L8t
L8t
22
1 cycle
24
L8t
L8t
L8t
23
25
Parameter
28
Data Sheet S16685EJ3V0DS
Min.
91
57
34
0
−
−
−
4
−
3
0
−
N − 1 cycle
Typ.
L8t
EP1_STOPB is not asserted in
the case of a full packet.
31
µ
PD720122
Max.
10
57
14
15
∞
∞
∞
∞
∞
−
−
−
N cycle
L8t
L8t
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
33
32
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