UPD720100AGM-8EY Renesas Electronics America, UPD720100AGM-8EY Datasheet - Page 17

• Manufacturer Part Number: UPD720100AGM-8EY
• Manufacturer: Renesas Electronics America

Specifications of UPD720100AGM-8EY

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Power Consumption
Power Consumption
Notes
Parameter
1. When any device is not connected to all the ports of HC, the power consumption for HC does not
2. The number of active ports is set by the value of Port No field in PCI configuration space EXT
3. For the condition of clock stop, see
4. When the device state = D1, PCI clock is defined as it is running. When the device state = D2 or D3,
5. If 48 MHz oscillator clock-in is used, power consumption for oscillator block + HC chip will be more
depend on the number of active ports.
register.
Operation.
PCI clock is defined as it is stopped.
than 15 mA.
P
P
P
P
P
P
P
P
P
P
P
Symbol
WD0-0
WD0-2
WD0-3
WD0-4
WD0-5
WD0_S
WD0_C
WD1
WD2
WD3H
WD3C
The power consumption under the state without suspend.
Device state = D0, All the ports does not connect to any
function.
The power consumption under the state without suspend.
Device state = D0, The number of active ports is 2.
The power consumption under the state without suspend.
Device state = D0, The number of active ports is 3.
The power consumption under the state without suspend.
Device state = D0, The number of active ports is 4.
The power consumption under the state without suspend.
Device state = D0, The number of active ports is 5.
The power consumption under suspend state.
Device state = D0, The internal clock is stopped.
The power consumption under suspend state during PCI clock
is stopped by CRUN0. Device state = D0,
The internal clock is stopped.
Device state = D1, Analog PLL output is stopped.
Device state = D2, Analog PLL output is stopped.
Device state = D3
Analog PLL output is stopped.
Device state = D3
Oscillator output is stopped.
High-speed device(s) is (are) on the port.
High-speed device(s) is (are) on the port.
High-speed device(s) is (are) on the port.
High-speed device(s) is (are) on the port.
Full- or low-speed device(s) is (are) on the port.
Full- or low-speed device(s) is (are) on the port.
Full- or low-speed device(s) is (are) on the port.
Full- or low-speed device(s) is (are) on the port.
Note 1
Data Sheet S15535EJ3V0DS
µ
hot
cold
PD720100A User’s Manual 7.3 Control for System Clock
, PIN_EN = High
, PIN_EN = Low
Condition
Note 3, 4, 5
Note 3
Note 3, 4
Note 3
Note 3, 4
Note 3, 4
Note 2
Note 2
Note 2
Note 2
µ
PD720100A
168.0
186.2
301.6
195.3
368.4
204.4
435.2
213.5
502.0
136.2
113.0
TYP.
24.7
10.9
10.9
650
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
µ
A
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