LTC2951CTS8-2#PBF Linear Technology, LTC2951CTS8-2#PBF Datasheet - Page 12

• Manufacturer Part Number: LTC2951CTS8-2#PBF
• Manufacturer: Linear Technology

Specifications of LTC2951CTS8-2#PBF

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 8
• Mounting: Surface Mount
• Package Type: TSOT-23
• Case Length: 2.9mm
• Screening Level: Commercial
• Lead Free Status / RoHS Status: Compliant

LTC2951-1/LTC2951-2
APPLICATIO S I FOR ATIO
TYPICAL APPLICATIO S
Voltage Monitoring with ⎯ K ⎯ I ⎯ L ⎯ L Input
The ⎯ K ⎯ I ⎯ L ⎯ L pin can be used as a voltage monitor. Figure
5 shows an application where the ⎯ K ⎯ I ⎯ L ⎯ L pin has a dual
function. It is driven by a low leakage open drain output
of the µP. It is also connected to a resistor divider that
monitors battery voltage (V
falls below the set value, the voltage at the ⎯ K ⎯ I ⎯ L ⎯ L pin falls
below 0.6V and the EN pin is quickly pulled low. Note that
the resistor values should be as large as possible, but
small enough to keep leakage currents from tripping the
0.6V ⎯ K ⎯ I ⎯ L ⎯ L comparator.
12
High Voltage Pins
The V
⎯ P ⎯ B can, additionally, operate below ground (–6V) without
latching up the device. ⎯ P ⎯ B has an ESD HBM rating of ±10kV.
If the push button switch connected to ⎯ P ⎯ B exhibits high
leakage current, then an external pull-up resistor to V
recommended. Furthermore, if the push button switch is
physically located far from the LTC2951 ⎯ P ⎯ B pin, parasitic
0.1µF
C4
IN
Figure 5. Input Voltage Monitoring with ⎯ K ⎯ I ⎯ L ⎯ L Input
V
and ⎯ P ⎯ B pins can operate at voltages up to 26.4V.
IN
9V
V
PB
GND
5.4V THRESHOLD
IN
KILLT
LTC2951-1
U
C
0.033µF
KILLT
*
OFFT
KILL
U
INT
EN
IN
). When the battery voltage
C
0.033µF
OFFT
806k
100k
1%
1%
R3
R2
U
*
W
*OPTIONAL
V
SHDN
IN
LT1767-3.3
R1
10k
V
OUT
INT
KILL
(OPEN DRAIN)
U
µP
2951 F05
3.3V
IN
is
capacitances may couple onto the high impedance ⎯ P ⎯ B
input. Additionally, parasitic series inductance may cause
unpredictable ringing at the ⎯ P ⎯ B pin. Placing a 5k resistor
from the ⎯ P ⎯ B pin to the push button switch would mitigate
parasitic inductance problems. Placing a 0.1µF capacitor
on the ⎯ P ⎯ B pin would lessen the impact of parasitic capaci-
tive coupling.
The DC/DC converter shown has an internal pull-up cur-
rent on its ⎯ S ⎯ H ⎯ D ⎯ N pin. A pull-up resistor on EN is thus not
needed.
Operation Without µP
Figure 6 shows how to connect the ⎯ K ⎯ I ⎯ L ⎯ L pin when there
is no circuitry available to drive it. The minimum pulse
width detected is 30µs. If there are glitches on the resis-
tor pull-up voltage that are wider than 30µs and transition
below 0.6V, then an appropriate bypass capacitor should
be connected to the ⎯ K ⎯ I ⎯ L ⎯ L pin.
0.1µF
C4
V
IN
9V
V
PB
GND KILLT
IN
LTC2951-1
Figure 6. No µP Application
C
0.033µF
KILLT
*
OFFT
KILL
INT
EN
C
0.033µF
OFFT
*
*OPTIONAL
V
SHDN
IN
LT1767-3.3
V
OUT
+
R1
100k
C3*
0.01µF
2951 F06
3.3V
295112fa