LTC2906CTS8 Linear Technology, LTC2906CTS8 Datasheet - Page 11

• Manufacturer Part Number: LTC2906CTS8
• Manufacturer: Linear Technology

Specifications of LTC2906CTS8

• Voltage Supervisor Type: Voltage Monitor
• Number Of Voltage Supervisors: 2
• Monitored Supervisor Voltage: 5/3.3/2.5/Adj
• Package Type: TSOT-23
• Operating Temperature Classification: Commercial
• Operating Temp Range: 0C to 70C
• Pin Count: 8
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

APPLICATIO S I FOR ATIO
Leaving the TMR pin open with no external capacitor
generates a reset time-out of approximately 200 s. For
long reset time-out, the only limitation is the availability of
a large value capacitor with low leakage. The TMR capaci-
tor will never charge if the leakage current exceeds the
TMR charging current of 2.1 A (typical).
RST and RST Output Characteristics
The DC characteristics of the RST and RST pull-up and
pull-down strength are shown in the Typical Performance
Characteristics section. Both RST and RST have a weak
internal pull-up to V
The weak pull-up and strong pull-down arrangement
allows these two pins to have open-drain behavior while
possessing several other beneficial characteristics.
The weak pull-ups eliminate the need for external pull-up
resistors when the rise time on these pins is not critical. On
the other hand, the open-drain RST configuration allows
for wired-OR connections and can be useful when more
than one signal needs to pull-down on the RST line.
As noted in the Power-Up and Power-Down sections, the
circuits that drive RST and RST are powered by V
MAX (V1, V
guarantees a maximum V
V
on. Therefore, an external pull-up resistor of no more than
100k is recommended on the RST pin if the state and pull-
up strength of the RST pin is crucial at very low V
MAX
= 1V the weak pull-up current on RST is barely turned
Figure 2. Reset Time-Out Period vs Capacitance
CC
10000
1000
). During fault condition, V
100
0.1
10
1
10p
MAX
U
100p
and a strong pull-down to ground.
U
OL
C
TMR
1n
= 0.4V at RST. However, at
(FARAD)
10n
W
100n
MAX
29067 F02
of at least 1V
1
U
MAX
MAX
.
=
Note however, by adding an external pull-up resistor, the
pull-up strength on the RST pin is increased. Therefore, if
it is connected in a wired-OR connection, the pull-down
strength of any single device needs to accommodate this
additional pull-up strength.
Output Rise and Fall Time Estimation
The RST and RST output have strong pull-down capability.
The following formula estimates the output fall time (90%
to 10%) for a particular external load capacitance (C
where R
transistor estimated to be typically 40 at V
room temperature (25 C), and C
capacitance on the pin. Assuming a 150pF load capaci-
tance, the fall time is about 13ns.
The rise time on the RST and RST pins is limited by weak
internal pull-up current sources to V
formula estimates the output rise time (10% to 90%) at the
RST and RST pins:
where R
Notice that this pull-up transistor is modeled as a
6 A current source in the Block Diagram as a typical
representation.
The on-resistance as a function of the V
V
estimated as follows:
At V
capacitance, the rise time is 86 s. A smaller external pull-
up resistor maybe used if the output needs to pull up faster
and/or to a higher voltage. For example, the rise time
reduces to 3.3 s for a 150pF load capacitance, when using
a 10k pull-up resistor.
CC
t
t
R
FALL
RISE
) voltage (for V
MAX
PU
PD
PU
= 3.3V, R
2.2 • R
2.2 • R
MAX V V
is the on-resistance of the internal pull-down
is the on-resistance of the pull-up transistor.
( ,
6 10
PU
PD
1
•
PU
• C
• C
MAX
LTC2906/LTC2907
CC
is about 260k. Using 150pF for load
5
LOAD
) –
LOAD
> 1V) at room temperature is
1
V
LOAD
MAX
is the external load
MAX
. The following
MAX
= MAX (V1,
11
>1V, at
LOAD
29067f
):