STPCE1HEBC STMicroelectronics, STPCE1HEBC Datasheet - Page 39

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STPCE1HEBC

Manufacturer Part Number
STPCE1HEBC
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of STPCE1HEBC

Operating Temperature (min)
0C
Operating Temperature (max)
70C
Processing Unit
Microprocessor
Operating Supply Voltage (min)
2.45/3V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
2.7/3.6V
Package Type
BGA
Screening Level
Commercial
Pin Count
388
Mounting
Surface Mount
Rad Hardened
No
Lead Free Status / RoHS Status
Not Compliant

Available stocks

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4.5.2 RESET SEQUENCE
Figure 4-4
STPC, also called warm reset.
The constraints on the strap options and the bus
activities are the same as for the cold reset.
The SYSRSTI# pulse duration must be long
enough to have all the strap options stabilized and
must be adjusted depending on resistor values.
Figure 4-4. Reset timing diagram
14 M Hz
SYSRSTI#
ISACLK
Strap Options
HCLK
PCI_CLK
SYSRSTO#
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
describes the reset sequence of the
M D[63:0]
Release 1.3 - January 29, 2002
1.6 V
VALID CONFIGURATION
It is mandatory to have a clean reset pulse without
glitches as the STPC could then sample invalid
strap option setting and enter into an umpredicta-
ble mode.
While SYSRSTI# is active, the PCI clock PLL runs
in open loop mode at a speed of few 100’s KHz.
ELECTRICAL SPECIFICATIONS
2.3 m s
39/87

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