54ACT283D/NOPB National Semiconductor, 54ACT283D/NOPB Datasheet

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54ACT283D/NOPB

Manufacturer Part Number
54ACT283D/NOPB
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of 54ACT283D/NOPB

Logic Family
ACT
Logical Function
Binary Full Adder
Technology
CMOS
Number Of Elements
1
Number Of Bits
4
Propagation Delay Time
17ns
High Level Output Current
-24mA
Low Level Output Current
24mA
Operating Supply Voltage (typ)
5V
Operating Temp Range
-55C to 125C
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Pin Count
16
Mounting
Through Hole
Operating Temperature Classification
Military
Lead Free Status / RoHS Status
Compliant
© 1998 National Semiconductor Corporation
54ACT283
4-Bit Binary Full Adder with Fast Carry
General Description
The ’ACT283 high-speed 4-bit binary full adder with internal
carry lookahead accepts two 4-bit binary words (A
B
outputs (S
nificant bit. The ’ACT283 will operate with either active HIGH
or active LOW operands (positive or negative logic).
Logic Symbols
Connection Diagrams
0
–B
3
) and a Carry input (C
0
–S
3
) and the Carry output (C
for DIP and Flatpak
Pin Assignment
IEEE/IEC
0
). It generates the binary Sum
DS100977-2
DS100977-4
4
DS100977
) from the most sig-
DS100977-1
0
–A
3
,
Features
n Guaranteed 4000V minimum ESD protection
n Outputs source/sink 24 mA
n TTL-compatible inputs
n Available to Mil-Std-883
Functional Description
The ’ACT283 adds two 4-bit binary words (A plus B) plus the
incoming Carry (C
(S
of the various inputs and outputs is indicated by the subscript
numbers, representing powers of two.
Interchanging inputs of equal weight does not affect the op-
eration. Thus C
6 and 7 for DIPS, and 7, 8 and 9 for chip carrier packages.
Due to the symmetry of the binary add function, the ’ACT283
can be used either with all inputs and outputs active HIGH
(positive logic) or with all inputs and outputs active LOW
(negative logic). See Figure 1 . Note that if C
must be tied LOW for active HIGH logic or tied HIGH for ac-
tive LOW logic.
Due to pin limitations, the intermediate carries of the
’ACT283 are not brought out for use as inputs or outputs.
However, other means can be used to effectively insert a
carry into, or bring a carry out from, an intermediate stage.
Figure 2 shows how to make a 3-bit adder. Tying the oper-
and inputs of the fourth adder (A
pendent only on, and equal to, the carry from the third adder.
Using somewhat the same principle, Figure 3 shows a way
of dividing the ’ACT283 into a 2-bit and a 1-bit adder. The
third stage adder (A
getting a carry (C
B
2
0
) and bringing out the carry from the second stage on S
–S
3
) and outgoing carry (C
2
= S
0
+ 2
0
, A
(A
Pin Assignment for LCC
0
10
2
0
0
0
+ 2S
) signal into the fourth stage (via A
). The binary sum appears on the Sum
, B
2
(A
+ B
, B
Where (+) = plus
2
0
2
0
1
can be arbitrarily assigned to pins 5,
+ B
, S
+ C
+ 4S
2
2
) is used merely as a means of
) + 2
0
) + 2
4
2
) outputs. The binary weight
+ 8S
3
3
, B
1
(A
(A
3
3
DS100977-3
3
) LOW makes S
+ 16C
1
+ B
+ B
3
September 1998
)
1
0
4
)
www.national.com
is not used it
2
3
and
de-
2
.

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54ACT283D/NOPB Summary of contents

Page 1

... The ’ACT283 will operate with either active HIGH or active LOW operands (positive or negative logic). Logic Symbols IEEE/IEC DS100977-4 Connection Diagrams Pin Assignment for DIP and Flatpak DS100977-2 © 1998 National Semiconductor Corporation DS100977 Features n Guaranteed 4000V minimum ESD protection – Outputs source/sink ...

Page 2

Functional Description Note that as long as A and B are the same, whether HIGH LOW, they do not influence S . Similarly, when A 2 are the same the carry into the third stage does not ...

Page 3

Logic Diagram 3 www.national.com ...

Page 4

... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to CC Ground Pin Input Voltage (Note 2) Input Current (Note 2) ...

Page 5

AC Electrical Characteristics for ’ACT Family Devices Symbol Parameter t Propagation Delay PLH PHL Propagation Delay PLH PHL Propagation Delay PLH t C ...

Page 6

6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Ceramic Leadless Chip Carrier (L) 16-Lead Ceramic Dual-In-Line Package (D) Package Number E20A Package Number J16A 7 www.national.com ...

Page 8

... National Semiconductor Asia Pacific Customer Fax: +49 (0) 1 80-530 85 86 Response Group Email: europe.support@nsc.com Tel: 65-2544466 Fax: 65-2504466 Tel: +49 (0) 1 80-532 78 32 Email: sea.support@nsc.com Tel: +49 (0) 1 80-534 16 80 National Semiconductor Japan Ltd. Tel: 81-3-5620-6175 Fax: 81-3-5620-6179 ...

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