74ALVCH162268PAG8 IDT, Integrated Device Technology Inc, 74ALVCH162268PAG8 Datasheet

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74ALVCH162268PAG8

Manufacturer Part Number
74ALVCH162268PAG8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 74ALVCH162268PAG8

Lead Free Status / RoHS Status
Compliant
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical t
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
• V
• V
• V
• CMOS power levels (0.4µ µ µ µ µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in TSSOP and TVSOP packages
DRIVE FEATURES:
• High Output Drivers: ±24mA (A port)
• Balanced Output Drivers: ±12mA (B port)
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 2004 Integrated Device Technology, Inc.
FUNCTIONAL BLOCK DIAGRAM
IDT74ALVCH162268
3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
machine model (C = 200pF, R = 0)
CC
CC
CC
= 3.3V ± 0.3V, Normal Range
= 2.5V ± 0.2V
= 2.7V to 3.6V, Extended Range
SK(o)
(Output Skew) < 250ps
CLKEN1B
CLKEN2B
CLKENA2
CLKENA1
OEA
CLK
OEB
SEL
A
1
8
29
2
27
30
55
28
1
56
1 of 12 Channels
3.3V CMOS 12-BIT TO 24-BIT
REGISTERED BUS EX-
CHANGER WITH 3-STATE
OUTPUTS AND BUS-HOLD
1D
C 1
1D
C1
CE
1D
C1
0
1
1
DESCRIPTION:
dual metal CMOS technology. This device is used for applications in which
data must be transferred from a narrow high-speed bus to a wide, lower-
frequency bus.
tween the two ports. Data is stored in the internal registers on the low-to-
high transition of the clock (CLK) input when the appropriate clock-enable
(CLKEN) inputs are low. The select (SEL) line is synchronous with CLK and
selects 1B or 2B input data for the A outputs. For data transfer in the A-to-
B direction, a two-stage pipeline is provided in the A-to-1B path, with a single
storage register in the A-to-2B path. Proper control of these inputs allows
two sequential 12-bit words to be presented as a 24-bit word on the B-port.
Data flow is controlled by the active-low output enables (OEA and OEB).
These control terminals are registered to synchronize the bus-direction
changes with CLK.
the “B” port which will significantly reduce line noise when used with light
loads. This driver has been designed to drive ±12mA at the designated
threshold levels. The “A” port has a ±24mA driver.
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
This 12-bit to 24-bit registered bus exchanger is built using advanced
The ALVCH162268 device provides synchronous data exchange be-
The ALVCH162268 has series resistors in the device output structure of
The ALVCH162268 has “bus-hold” which retains the inputs’ last state
CE
CE
CE
1D
CE
1D
1D
C1
C1
C1
C1
C1
1D
1D
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH162268
23
6
1
2
B
B
1
1
JANUARY 2004
DSC-4535/2

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74ALVCH162268PAG8 Summary of contents

Page 1

IDT74ALVCH162268 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER FEATURES: • 0.5 MICRON CMOS Technology • Typical t (Output Skew) < 250ps SK(o) • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R ...

Page 2

IDT74ALVCH162268 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER PIN CONFIGURATION OEA 1 2 CLKEN1B GND ...

Page 3

IDT74ALVCH162268 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER FUNCTION TABLES (CONTINUED) B-TO-A STORAGE (OEA = L AND OEA = H) Inputs CLKEN1B CLKEN2B CLK SEL ↑ ↑ L ...

Page 4

IDT74ALVCH162268 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition –40°C to +85°C A Symbol Parameter V Input HIGH Voltage Level IH V Input LOW ...

Page 5

IDT74ALVCH162268 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER OUTPUT DRIVE CHARACTERISTICS (A PORT) Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL NOTE and V must be within the min. or max. range shown ...

Page 6

IDT74ALVCH162268 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER SWITCHING CHARACTERISTICS (A PORT) Symbol Parameter f MAX t Propagation Delay PLH t CLK to Ax (1B) PHL t Propagation Delay PLH t CLK to Ax (2B) PHL t Propagation Delay ...

Page 7

IDT74ALVCH162268 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS (1) (1) Symbol V = 3.3V±0. 2. LOAD V 2.7 2 1.5 1 300 ...

Page 8

IDT74ALVCH162268 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER ORDERING INFORMATION IDT XX ALVC X XX Temp. Range Bus-Hold Family CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 XXX XX Device Type Package Thin Shrink Small Outline Package PA ...

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