BOXD945GTPLKR Intel (CPU), BOXD945GTPLKR Datasheet - Page 48

• Manufacturer Part Number: BOXD945GTPLKR
• Manufacturer: Intel (CPU)

Specifications of BOXD945GTPLKR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Intel Desktop Board D945GTP Technical Product Specification
2.4 Fixed I/O Map
48
Table 12.
Notes:
1.
2.
3.
Some additional I/O addresses are not available due to ICH7 address aliasing. The ICH7 data
sheet provides more information on address aliasing.
NOTE
0228 - 022F
04D0 - 04D1
Address (hex)
0000 - 00FF
0170 - 0177
01F0 - 01F7
0278 - 027F
02E8 - 02EF
02F8 - 02FF
0374 - 0377
0377, bits 6:0
0378 - 037F
03E8 - 03EF
03F0 - 03F5
03F4 – 03F7
03F8 - 03FF
LPTn + 400
0CF8 - 0CFB
0CF9
0CFC - 0CFF
FFA0 - FFA7
FFA8 - FFAF
For information about
Obtaining the ICH7 data sheet
Default, but can be changed to another address range
Dword access only
Byte access only
(Note 3)
I/O Map
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 2)
256 bytes
8 bytes
8 bytes
8 bytes
8 bytes
8 bytes
7 bits
8 bytes
8 bytes
2 bytes
8 bytes
4 bytes
1 byte
4 bytes
8 bytes
8 bytes
Size
8 bytes
4 bytes
6 bytes
1 byte
8 bytes
Description
Used by the Desktop Board D945GTP. Refer to the ICH7
data sheet for dynamic addressing information.
Secondary Parallel ATA IDE channel command block
Primary Parallel ATA IDE channel command block
LPT3
LPT2
COM4
COM2
Secondary Parallel ATA IDE channel control block
Secondary IDE channel status port
LPT1
COM3
Diskette channel
Primary Parallel ATA IDE channel control block
COM1
Edge/level triggered PIC
ECP port, LPTn base address + 400h
PCI Conventional bus configuration address register
Reset control register
PCI Conventional bus configuration data register
Primary Parallel ATA IDE bus master registers
Secondary Parallel ATA IDE bus master registers
Refer to
Section 1.2, page 15