SI3210-FTR Silicon Laboratories Inc, SI3210-FTR Datasheet - Page 66

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SI3210-FTR

Manufacturer Part Number
SI3210-FTR
Description
SLIC 1-CH 60dB 41mA 3.3V/5V 38-Pin TSSOP T/R
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3210-FTR

Package
38TSSOP
Number Of Channels Per Chip
1
Polarity Reversal
Yes
Longitudinal Balanced
60 dB
Loop Current
41 mA
Minimum Operating Supply Voltage
3.13 V
Typical Operating Supply Voltage
3.3|5 V
Typical Supply Current
88 mA
Function
Subscriber Line Interface Concept (SLIC), CODEC
Interface
PCM, SPI
Number Of Circuits
1
Voltage - Supply
3.3V, 5V
Current - Supply
88mA
Power (watts)
700mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
38-TSSOP
Includes
BORSCHT Functions, DTMF Generation and Decoding, FSK Generation, Pulse Metering Generation, Voice Loopback Test Modes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI3210-FTR
Manufacturer:
SILCONX
Quantity:
160
Part Number:
SI3210-FTR
Manufacturer:
SILICON
Quantity:
8 000
Part Number:
SI3210-FTR
Manufacturer:
SILICON LABS/芯科
Quantity:
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Si3210/Si3211
Register 2. PCM Transmit Start Count—Low Byte
Reset settings = 0000_0000
Register 3. PCM Transmit Start Count—High Byte
Reset settings = 0000_0000
Register 4. PCM Receive Start Count—Low Byte
Reset settings = 0000_0000
66
Name
Name
Name
Bit
7:0
Bit
7:2
1:0
Bit
7:0
Type
Type
Type
Bit
Bit
Bit
TXS[7:0]
Reserved
RXS[7:0]
TXS[9:8]
Name
Name
Name
D7
D7
D7
PCM Transmit Start Count.
PCM transmit start count equals the number of PCLKs following FSYNC before data trans-
mission begins. See Figure 29 on page 55.
Read returns zero.
PCM Transmit Start Count.
PCM transmit start count equals the number of PCLKs following FSYNC before data
transmission begins. See Figure 29 on page 55.
PCM Receive Start Count.
PCM receive start count equals the number of PCLKs following FSYNC before data
reception begins. See Figure 29 on page 55.
D6
D6
D6
D5
D5
D5
Rev. 1.45
D4
D4
D4
TXS[7:0]
RXS[7:0]
R/W
R/W
Function
Function
Function
D3
D3
D3
D2
D2
D2
D1
D1
D1
TXS[9:8]
R/W
D0
D0
D0

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