AT27C4096-55PI Atmel, AT27C4096-55PI Datasheet - Page 3

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AT27C4096-55PI

Manufacturer Part Number
AT27C4096-55PI
Description
Manufacturer
Atmel
Datasheet

Specifications of AT27C4096-55PI

Organization
256Kx16
Interface Type
Parallel
In System Programmable
External
Access Time (max)
55ns
Package Type
PDIP
Reprogramming Technique
OTP
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
40mA
Pin Count
40
Mounting
Through Hole
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Not Compliant
3. System Considerations
4. Block Diagram
5. Absolute Maximum Ratings*
Note:
0311I–EPROM–12/07
Temperature Under Bias............................... -55° C to +125° C
Storage Temperature .................................... -65° C to +150° C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
V
Respect to Ground .......................................-2.0V to +14.0V
PP
Supply Voltage with
1. Maximum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
V
CC
+ 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.
Switching between active and standby conditions via the Chip Enable pin may produce tran-
sient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
close as possible to the point where the power supply is connected to the array.
CC
(1)
(1)
(1)
and Ground terminals. This capacitor should be positioned as
*NOTICE:
CC
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
and Ground terminals of the device, as close
AT27C4096
3

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