SLATA2GM1UI STEC, SLATA2GM1UI Datasheet - Page 6
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SLATA2GM1UI
Manufacturer Part Number
SLATA2GM1UI
Description
Manufacturer
STEC
Type
PC Cardr
Datasheet
1.SLATA2GM1UI.pdf
(35 pages)
Specifications of SLATA2GM1UI
Density
2GByte
Operating Supply Voltage (typ)
3.3/5V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Package Type
Not Required
Mounting
Socket
Pin Count
68
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
3.18/4.75V
Operating Supply Voltage (max)
3.465/5.25V
Programmable
Yes
Lead Free Status / RoHS Status
Compliant
SLATAxxx(M/G)M1U(I)
Datasheet
1.4
BVD2
(PC Card Memory Mode)
-SPKR
(PC Card I/O Mode)
-DASP
(True IDE Mode)
-CD1, -CD2
(PC Card Memory Mode)
-CD1, -CD2
-CD1, -CD2
D15-D00
(PC Card Memory Mode)
D15-D00
PC Card I/O Mode
D15-D00
(True IDE Mode)
-IOWR
(PC Card Memory Mode)
-IOWR
(PC Card I/O Mode)
-IOWR
(True IDE Mode)
-IORD
(PC Card Memory Mode)
-IORD
(PC Card I/O Mode)
-IORD
(True IDE Mode)
-WE
(PC Card Memory Mode)
-WE
(PC Card I/O Mode)
-WE
(True IDE Mode)
-OE
(PC Card Memory Mode)
(PC Card I/O Mode)
(True IDE Mode)
Signal Descriptions
Signal Name
Type
I/O
I/O
I/O
I
I
I
I
Table 3: ATA PC Card Signal Descriptions
32, 31, 30
65, 64, 6,
5, 4, 3, 2,
Number
61000-04497-117, April 2008
37, 38,
39, 40,
41, 66,
36, 67
Pin
62
45
44
15
9
This output line is always driven to a high state in Memory
Mode since a battery is not required for this product.
This output line is always driven to a high state in I/O Mode
since this product produces no audio.
In the True IDE Mode, this input/output is the Disk
Active/Slave Present signal in the Master/Slave handshake
protocol.
These Card Detect pins are connected to ground on the card.
They are used by the host to determine that the card is fully
inserted into the socket.
This signal is the same as Memory Mode.
These signals are not used in IDE Mode.
These lines carry the data, commands, and host and the
controller. D00 is the LSB of the LSB of the Odd Byte of the
Word.
This signal is the same as the PC Card Memory Mode signal.
In True IDE Mode, all Task File operations occur in byte
mode on the low order bus D00-D07 while all data transfers
are 16 bit using D00-D15.
This signal is not used in this mode.
The I/O Write strobe pulse is used to clock I/O data onto the
data bus and into the controller registers. The clocking
occurs on the negative to positive edge of the signal (trailing
edge).
In True IDE Mode, this signal has the same function as in PC
Card I/O Mode.
This signal is not used in this mode.
This is an I/O Read strobe generated by the host. This signal
gates I/O data onto the bus from the ATA PC Card.
In True IDE Mode, this signal has the same function as in PC
Card I/O Mode.
This is a signal driven by the host and used for strobing
memory write data into the registers. It is also used for writing
the configuration registers.
In PC Card I/O Mode, this signal is used for writing the
configuration registers.
In True IDE Mode, this input signal is not used and should be
connected to VCC.
This is an Output Enable strobe generated by the host interface.
It is used to read data from the ATA PC Card in PC Card
Memory Mode and to read the CIS and configuration registers.
Description
ATA PC Card
6