DK-DEV-3SL150N/ES Altera, DK-DEV-3SL150N/ES Datasheet

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DK-DEV-3SL150N/ES

Manufacturer Part Number
DK-DEV-3SL150N/ES
Description
Manufacturer
Altera
Datasheet
1.DK-DEV-3SL150NES.pdf (1 pages)

Specifications of DK-DEV-3SL150N/ES

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Copyright © 1995-2008 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA
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Stratix III FPGA Development Kit
from Altera Corporation
The Stratix
designs requiring high-performance and high-density devices.
Altera
power consumption. You'll find Stratix III FPGAs provide the high-performance and high-integration capabilities
needed for next-generation basestations, network infrastructure, and advanced imaging equipment.
Stratix III FPGA Development Kit Ordering Information
HSMC Interface
Altera developed the specification for the high-speed mezzanine connector (HSMC) interface, which is based
on the
and host boards. This specification outlines both the electrical and mechanical properties of the interface
between daughtercard and host. You can also create your own HSMC interface compatible daughtercards.
Available Documentation
The installer package for this board containing all of the documentation and software examples is available at
ftp://ftp.altera.com/outgoing/devkit/StratixIII_Dev_Kit-v7.2.0.exe.
Stratix III FPGA Development Kit Contents
The Stratix III FPGA Development Kit is RoHS compliant and includes:
Table 1. Stratix III FPGA Development Kit Ordering Code and Pricing Information
Ordering Code
DK-DEV-3SL150N
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Developm ent Kit
Design Softw are
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Samtec mechanical
Stratix III FPGAs combine the world's highest performance and highest density with the lowest possible
Ordering Information
HSMC Interface
Available Documentation
Development Kit Contents
Request a copy of the HSMC specification
Stratix III development board
Quartus II Development Kit Edition software, including a one-year license
Cable and accessories
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III FPGA Development Kit delivers a complete environment for the development and testing of
Stratix III EP3SL150F1152 high-performance FPGA
Clocking
Configuration
General user input/output
Memory devices
Components and interfaces
External AC adapter power supply
Power cord (including support for UK, Europe)
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End Markets
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| Technology Center
Intellectual Property
142,500 equivalent logic elements (LEs)
744 user I/O pins
384 18 x 18 multipliers
125.000-MHz oscillator
50.000-MHz oscillator
SMA input
SMA output
MAX
On-board USB-Blaster
JTAG download port
Power consumption display
System reset pushbutton
Board-specific DIP switch
JTAG bypass DIP switch
User reset pushbutton
User pushbuttons (x4)
User DIP switch (x8)
User LEDs (x8)
User quad 7-segment display
128 x 64 dot pixels graphics display
LCD (16 character x 2 line)
128-Mbyte DDR2 SDRAM DIMM
16-Mbyte DDR2 SDRAM devices (individually addressable)
36-Mbit QDRII SRAM device
4-Mbyte PSRAM
64-Mbyte flash memory
USB 2.0
10/100/1000 Ethernet
Two HSMC interfaces
|
Site Help
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connector, to define and standardize the interface between optional daughtercards
$2,495
II flash passive serial configuration circuit
Technology Center
Price
MAX II EPM2210GF256C3N CPLD
Displays each power rail individually
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2,210 LEs
272 user I/O pins
8 Kbytes of user flash memory
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