XC3SD3400A-5FGG676C Xilinx Inc, XC3SD3400A-5FGG676C Datasheet - Page 4

FPGA Spartan®-3A Family 3.4M Gates 53712 Cells 770MHz 90nm Technology 1.2V 676-Pin FBGA

XC3SD3400A-5FGG676C

Manufacturer Part Number
XC3SD3400A-5FGG676C
Description
FPGA Spartan®-3A Family 3.4M Gates 53712 Cells 770MHz 90nm Technology 1.2V 676-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3A DSPr

Specifications of XC3SD3400A-5FGG676C

Package
676FBGA
Family Name
Spartan®-3A
Device Logic Units
53712
Device System Gates
3400000
Maximum Internal Frequency
770 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
469
Ram Bits
2322432
Number Of Logic Elements/cells
53712
Number Of Labs/clbs
5968
Total Ram Bits
2322432
Number Of I /o
469
Number Of Gates
3400000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
122-1532 - KIT DEVELOPMENT SPARTAN 3ADSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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TAKE THE
Application Examples
Security and surveillance
Software defined radio
for mobile defense
communicators
Wireless access
Wireless base station digital
front end
Examples
Max Block RAM Memory
Distributed RAM (Kb)
Min Footprint (mm)
Bandwidth (Gbps)
DSP Performance
Frequency (MHz)
Block RAM (Kb)
DSP48* Slices
Connectivity
XtremeDSP
High Speed
Logic Cells
(GMACS)
Max DSP
Visit us online at
download your FREE evaluation copy of XtremeDSP software.
NEXT STEP
*
XtremeDSP Device Portfolio
1
2
*
3SD1800A 3SD3400A
227 x 622+ Mb/s
In Slow Speed Grade
In Fast Speed Grade
DSP48A, DSP48E, DSP48
37,440
Spartan-DSP
19x19
1,512
LVDS pairs
Spartan-3A DSP
1,512
• DSP performance needed for object
• Changing industry standards
• Rapidly evolving technology such as
• Ability to process wideband waveforms
• Multiple waveforms & partial reconfig
• Implementation of forward error correction
• Lower MAC layer implementation
• Lower power on per channel basis
• Scalability to add more channels in the future
Application Challenges
260
250
21
84
recognition, motion detection and advanced
compression algorithms
automated scene analysis
block and unique algorithm
1
1
1
213 x 622+ Mb/s
www.xilinx.com/dsp
53,712
19x19
2,268
LVDS pairs
2,268
126
373
250
32
1
1
1
120 x 1+ Gb/s
4VSX25
23,040
LVDS pairs
4,608
27x27
2,304
500
128
160
64
2
2
2
Virtex-4 SX
34,560
4VSX35
224 x 1+ Gb/s
6,912
27x27
3,456
LVDS pairs
500
192
240
96
2
2
XtremeDSP Advantage
• Xtreme DSP performance through DSP48 slices
• FPGA flexibility and scalability
• Field upgradability—Enabled by Spartan-DSP
• Ability to process wideband waveforms through
• On demand re-configurability for different protocols
• Lower power due to a single device handling multiple
• Proven IP Cores for the Physical Layer, FEC,
• Lowest cost per channel through integration
• Savings in operational expenses due to lower
• Ability to use low-cost power amplifiers with
2
and parallelism
parallelism of DSP48 slices
waveforms—Enabled by Spartan-DSP
and Security—Enabled by Spartan-DSP
power consumption
Crest Factor Reduction IP—Enabled by Virtex-DSP
to learn more and
4VSX55
11,520
55,296
360 x 1+ Gb/s
27x27
5,760
LVDS pairs
256
500
512
384
Virtex-DSP
2
2
2
180 x 1.25 Gb/s
5VSX35T
Transceivers
34,816
LVDS pairs,
8 x 3.2 Gb/s
6,653
27x27
3,024
106
550
192
520
2
2
2
Virtex-5 SXT
5VSX50T
240 x 1.25 Gb/s
12 x 3.2 Gb/s
52,224
Transceivers
LVDS pairs,
10,454
27x27
4,752
158
550
288
780
2
2
2
5VSX95T
94,208
320 x 1.25 Gb/s
16 x 3.2 Gb/s
27x27
1,520
8,784
Transceivers
19,325
LVDS pairs
352
550
640
2
2
2
Corporate Headquarters
Xilinx, Inc.
2100 Logic Drive
San Jose, CA 95124
USA
Tel: 408-559-7778
Web: www.xilinx.com
Europe
Xilinx Europe
One Logic Drive
Citywest Business Campus
Saggart, County Dublin
Ireland
Tel: +353-1-464-0311
Web: www.xilinx.com
Japan
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1-2-2 Osaki, Shinagawa-ku
Tokyo 141-0032 Japan
Tel: +81-3-6744-7777
Web: japan.xilinx.com
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Xilinx, Asia Pacific
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Singapore 486051
Tel: +65-6544-8999
Web: www.xilinx.com
www.xilinx.com
Copyright © 2OO7 Xilinx, Inc. All rights reserved. XILINX, the Xilinx Logo, and other
designated brands included herein are trademarks of Xilinx, Inc. All other trademarks
are the property of their respective owners
Printed in U.S.A. PN 2024

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