EVAL-CN0187-SDPZ Analog Devices Inc, EVAL-CN0187-SDPZ Datasheet - Page 4

no-image

EVAL-CN0187-SDPZ

Manufacturer Part Number
EVAL-CN0187-SDPZ
Description
BOARD, EVAL, FOR CN0187
Manufacturer
Analog Devices Inc
Series
-r
Datasheet

Specifications of EVAL-CN0187-SDPZ

Rohs Compliant
YES
Svhc
No SVHC (15-Dec-2010)
Main Purpose
Measurement, RF Power
Embedded
No
Utilized Ic / Part
ADA4891-4, ADL5502, ADP121, AD7266
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
CN-0187
The RMS and PEAK outputs of the ADL5502 pass through
unity gain buffers that drive cross-coupled stages for converting
the single-ended outputs to differential signals. The internal
+2.5 V reference of the AD7266 (via the D
passes through another unity gain buffer and a voltage divider.
This sets the common-mode voltage of the network to +1.25 V.
The AD7266 achieves simultaneous samples of the RMS and
PEAK outputs and transfers the data within a 1 µs response
time. The data is provided on a single serial data line. Because
slope and intercept vary from device to device, board-level
calibration must be performed to achieve high accuracy. In
general, calibration is performed by applying two input power
levels to the ADL5502 and measuring the corresponding output
voltages. The calibration points are generally chosen to be
within the linear operating range of the device. The best-fit line
is characterized by calculating the conversion gain (or slope)
and intercept using the following equations:
where:
V
V
Once gain and intercept are calculated, an equation can be
written that allows calculation of an (unknown) input power
based on the measured output voltage.
For an ideal (known) input power, the law conformance error of
the measured data can be calculated as
IN
VRMS
Figure 7. Output Response to Various RF Input Pulse Levels, Supply 3 V,
900 MHz Frequency, Square-Domain Filter Open, Output Filter 0.1 μF
is the rms input voltage to RFIN.
Gain = (V
Intercept = V
V
ERROR
is the voltage output at VRMS.
IN
= (V
VRMS
(dB)
VRMS2
− Intercept)/Gain
VRMS1
=
− V
20
− (Gain × V
VRMS1
×
with Parallel 1 kΩ
log
)/(V
1ms/DIV
V
VRMS, MEAS
IN2
400mV rms RF INPUT
160mV rms
70mV rms
250mV rms
IN1
− V
Gain
)
IN1
)
URED
×
CAP
V
PULSED RFIN
IN, IDEAL
A and D
Intercept
VRMS
CAP
B pins)
(1)
(2)
(3)
(4)
Rev. 0| Page 4 of 7
Figure 8 and Figure 9 show plots of the VRMS and PEAK error
at 25°C, the temperature at which the ADL5502 is calibrated.
Note that the error is not zero; this is because the ADL5502
does not perfectly follow the ideal linear equation, even within
its operating region. The error at the calibration points is,
however, equal to zero by definition.
When the characteristics (slope and intercept) of the VRMS and
PEAK outputs are known, the calibration for the CF calculation
is complete. A three-stage process must be taken to measure
and calculate the crest factor of any waveform. First, the
unknown signal must be applied to the RF input, and the
corresponding VRMS level is measured. This level is indicated
in Figure 10 as V
using V
Figure 8. Measured VRMS Linearity Error vs. Input Level, 450 MHz, 900 MHz,
Figure 9. Measured PEAK Linearity Error vs. Input Level, 450 MHz, 900 MHz,
–1
–2
–3
–1
–2
–3
3
2
1
0
–25
3
2
1
0
–25
VRMS-UNKNOWN
1900 MHz, 2350 MHz, 2600 MHz, Supply +3.3 V
1900 MHz, 2350 MHz, 2600 MHz, Supply +3.3 V
–20
–20
VRMS-UNKNOWN
–15
–15
and Equation 3.
–10
–10
INPUT (dBm)
INPUT (dBm)
. The RF input, V
–5
–5
0
0
5
5
Circuit Note
450MHz
900MHz
1900MHz
2350MHz
2600MHz
450MHz
900MHz
1900MHz
2350MHz
2600MHz
IN
, is calculated
10
10
15
15

Related parts for EVAL-CN0187-SDPZ