LC4256ZE-5TN100C Lattice, LC4256ZE-5TN100C Datasheet - Page 11
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LC4256ZE-5TN100C
Manufacturer Part Number
LC4256ZE-5TN100C
Description
IC PLD 256MC 64I/O 5.8NS 100TQFP
Manufacturer
Lattice
Series
ispMACH®r
Datasheet
1.LC4064ZE-5TN100C.pdf
(60 pages)
Specifications of LC4256ZE-5TN100C
Programmable Type
CPLD
Number Of Macrocells
256
Voltage - Input
1.7 V ~ 1.9 V
Speed
5.8ns
Mounting Type
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1029
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LC4256ZE-5TN100C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LC4256ZE-5TN100C
Manufacturer:
LATTICE
Quantity:
20 000
Lattice Semiconductor
Figure 9. Power Guard
All the I/O pins in a block share a common Power Guard Enable signal. For a block of I/Os, this signal is called a
Block Input Enable (BIE) signal. BIE can be internally generated using MC logic, or could come from external
sources using one of the user I/O or input pins.
Any I/O pin in the block can be programmed to ignore the BIE signal. Thus, the feature can be enabled or disabled
on a pin-by-pin basis.
Figure 10 shows Power Guard and BIE across multiple I/Os in a block that has eight I/Os.
Figure 10. Power Guard and BIE in a Block with 8 I/Os
Block Input Enable (BIE)
From Block PT. The Block PT
is part of the block AND Array,
and can be driven by signals
from the GRP.
D
Power Guard
To Macrocell
To GRP
To Macrocell
To GRP
To Macrocell
To GRP
E
0
1
11
Q
ispMACH 4000ZE Family Data Sheet
Power Guard
Power Guard
Power Guard
0
1
0
1
0
1
I/O 0
I/O 1
I/O 7