MIC74BQS Micrel Inc, MIC74BQS Datasheet - Page 6

IC I/O EXPANDER I2C 8B 16QSOP

MIC74BQS

Manufacturer Part Number
MIC74BQS
Description
IC I/O EXPANDER I2C 8B 16QSOP
Manufacturer
Micrel Inc
Series
-r
Datasheet

Specifications of MIC74BQS

Interface
I²C, SMBus
Number Of I /o
8
Interrupt Output
Yes
Frequency - Clock
-
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP (0.154", 3.90mm Width)
Includes
-
Lead Free Status / Rohs Status
Contains lead / RoHS non-compliant
Interrupt Mask Register
Power-On Default Value:0000 0000
Command_byte addess: 0000 0100
Type:
Bit Name: IMn
Function:
Operation: 1 = enabled
Notes:
Data Register
Power-On Default Value: 1111 1111
Command_byte addess: 0000 0101
Type:
Bit Name: Pn
Function:
Read Operation: 1 = Pn is high
Write Operation: 1 = Pn is set to one
Notes:
Micrel, Inc.
October 2006
D[7]
D[7]
IM7
P7
D[6]
D[6]
IM6
P6
8-bits, read/write
Interrupt enable bit for Pn when Pn is
configured as an input
0 = disabled
If Fan Mode is selected, that is, the FAN bit of
the DEV_CFG register is set to one, P[7:4] are
automatically configured as open-drain out-
puts. They are then referred to as /FS[2:0] and
/SHDN. No interrupts of any kind are
generated by these pins while in Fan Mode.
8-bits, read/write
Returns the current state of any Pn configured
as an input and the last value written to Pn’s
configured as outputs; Writing the DATA
register sets the output state of any Pn’s
configured as outputs; writes to I/O bits
configured as inputs are ignored
If Fan Mode is selected, that is, the FAN bit of
the DEV_CFG register is set to one, P[7:4] are
automatically configured as open-drain out-
puts. They are then referred to as /FS[2:0] and
/SHDN. The state of these pins is determined
by the FAN_SPEED register. While in Fan
Mode, D[7:4] of the DATA registers have no
effect.
D[5]
IM5
D[5]
P5
0 = Pn is low
0 = Pn is cleared
D[4]
INT_MASK
IM4
D[4]
P4
DATA
D[3]
IM3
D[3]
P3
b
b
b
b
D[2]
, 00
, 04
, 05
IM2
D[2]
, FF
P2
h
h
h
h
D[1]
IM1
D[1]
P1
D[0]
IM0
D[0]
P0
6
Fan Speed Register
Power-On Default Value: 0000 0000
Command_byte addess: 0000 0110
Type:
Bit Name: D[0] through D[2]
Function:
Operation:
Notes:
Bit Name: D[3] through D[7]
Function:
Operation: Always write as zero
D[7]
D[2:0]
Value
000
001
010
011
100
101
110
111
Always write as zero
D[6]
/FS[2:0]
fan off
8-bits, read/write
Determines bit-pattern on FS[2:0]
Any time the fan speed register contains zero,
that is, the fan is shut down, and a non-zero
value is written into the fan speed register, the
/FS[2:0] and /SHDN outputs will assume the
highest fan speed state for approximately one
second (t
state of the fan speed control outputs will
assume the value indicated by the contents of
FAN_SPEED. This insures that the fan will
start reliably when low speed operation is
desired.
Reserved
111
110
101
100
011
010
001
000
Output State
D[5]
Fan Speed Settings
FAN_SPEED
D[4]
START
/SHDN
0
1
1
1
1
1
1
1
). Following this interval, the
D[3]
b
speed 1 (slowest)
speed 7 (fastest)
b
D[2]
, 06
, 00
Fan Speed
speed 2
speed 3
speed 4
speed 5
speed 6
h
Fan Speed
h
off
D[1]
M9999-101006
D[0]
MIC74

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