SI5368B-C-GQ Silicon Laboratories Inc, SI5368B-C-GQ Datasheet - Page 22

• Manufacturer Part Number: SI5368B-C-GQ
• Description: IC CLK MULTIPLIER ATTEN 100TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5368B-C-GQ

• Package / Case: 100-TQFP, 100-VQFP
• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Frequency-max: *
• Number Of Circuits: 1
• Maximum Input Frequency: 710 MHz
• Minimum Input Frequency: 0.002 MHz
• Output Frequency Range: 0.002 MHz to 808 MHz
• Supply Voltage (max): 2.75 V
• Supply Voltage (min): 1.71 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.8 V, 2.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5368
Reset value = 0001 0010
Reset value = 1110 1101
22
Register 4.
Register 5.
Name
Name
Type
Type
Bit
Bit
3:0
7:6
4:0
Bit
4
5
AUTOSEL_
AUTOSEL_REG [1:0]
HIST_DEL
REG [1:0]
SQ_ICAL
Reserved
Reserved
Name
D7
D7
[4:0]
ICMOS [1:0]
R/W
R/W
SQ_ICAL.
This bit determines if the output clocks will remain enabled or be squelched (disabled)
during an internal calibration. See Table 4.
0: Output clocks enabled during ICAL.
1: Output clocks disabled during ICAL.
Reserved.
AUTOSEL_REG [1:0].
Selects method of input clock selection to be used.
00: Manual (either register or pin controlled. See CKSEL_PIN).
01: Automatic Non-Revertive
10: Automatic Revertive
11: Reserved
Reserved.
HIST_DEL [4:0].
Selects amount of delay to be used in generating the history information MHIST, the
value of M used during Digital Hold.
D6
D6
Reserved
D5
D5
R
SFOUT2_REG [2:0]
Preliminary Rev. 0.41
R/W
D4
D4
Function
D3
D3
HIST_DEL [4:0]
R/W
D2
D2
SFOUT1_REG [2:0]
R/W
D1
D1
D0
D0