NB6L11MMNG ON Semiconductor, NB6L11MMNG Datasheet - Page 5
![IC FANOUT BUFFER DIFF CML 16-QFN](/photos/6/51/65175/16-tqfn_485g_sml.jpg)
NB6L11MMNG
Manufacturer Part Number
NB6L11MMNG
Description
IC FANOUT BUFFER DIFF CML 16-QFN
Manufacturer
ON Semiconductor
Series
ECLinPS MAX™r
Type
Fanout Buffer (Distribution)r
Datasheet
1.NB6L11MMNR2G.pdf
(9 pages)
Specifications of NB6L11MMNG
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
Yes/Yes
Input
CML, LVCMOS, LVDS, LVNECL, LVPECL, LVTTL
Output
CML
Frequency - Max
4GHz
Voltage - Supply
2.375 V ~ 3.63 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TFQFN Exposed Pad
Frequency-max
4GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NB6L11MMNG
Manufacturer:
ON
Quantity:
127
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
10. Measured by forcing V
11. Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw− and Tpw+ @ 0.5GHz.
12. Device to device skew is measured between outputs under identical transition @ 0.5 GHz.
13. Additive RMS jitter with 50% duty cycle clock signal.
14. Additive peak−to−peak data dependent jitter with input NRZ data at PRBS23.
15. Input and output voltage swing is a single−ended measurement operating in differential mode.
Table 5. AC CHARACTERISTICS
+85°C; (Note 10)
Symbol
V
t
t
t
V
t
t
PD
SKEW
JITTER
r
f
OUTPP
INPP
(20% − 80%).
t
DC
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Output Voltage Amplitude (@ V
(Note 15) (See Figure 9)
Propagation Delay
Duty Cycle Skew (Note 11)
Within Device Skew
Device to Device Skew (Note 12)
Output Clock Duty Cycle (Reference Duty Cycle = 50%)
RMS Random Clock Jitter (Note 13)
Peak−to−Peak Data Dependent Jitter
(Note 14)
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 15)
Output Rise/Fall Times @ 0.5 GHz
(20% − 80%)
INPP
(MIN) from a 50% duty cycle clock source. All loading with an external R
V
CC
INPP(MIN)
Characteristic
= 2.375 V to 3.63 V, V
http://onsemi.com
EE
5
= 0 V, or V
f
f
in
f
f
in
in
in
f
f
≤ 3.5 GHz
≤ 4.0 GHz
in
≤ 3.0GHz
≤ 4.0GHz
in
≤ 4Gb/s
≤ 4GHz
D to Q
Q, Q
CC
= 0 V, V
EE
= −2.375 V to −3.63 V, T
Min
230
190
150
175
150
40
L
= 50 W to V
Typ
380
320
270
225
5.0
3.0
0.2
50
40
70
CC
. Input edge rates 40 ps
A
= −40°C to
2800
Max
325
120
0.5
15
15
80
60
Unit
mV
mV
ps
ps
ps
ps
%