DS0026CN National Semiconductor, DS0026CN Datasheet

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DS0026CN

Manufacturer Part Number
DS0026CN
Description
IC CLOCK DRIVER DUAL 5MHZ 8-DIP
Manufacturer
National Semiconductor
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of DS0026CN

Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
No/No
Input
TTL
Output
MOS
Frequency - Max
10MHz
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Frequency-max
10MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Voltage - Supply
-
Other names
*DS0026CN
DS0026

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS0026CN
Manufacturer:
NSC
Quantity:
4 600
Part Number:
DS0026CN
Manufacturer:
NS
Quantity:
1 000
Part Number:
DS0026CN
Manufacturer:
NS/国半
Quantity:
20 000
© 2010 National Semiconductor Corporation
Dual High-Speed MOS Driver
General Description
DS0026 is a low cost monolithic high speed two phase MOS
clock driver and interface circuit. Unique circuit design pro-
vides both very high speed operation and the ability to drive
large capacitive loads. The device accepts standard TTL out-
puts and converts them to MOS logic levels. The device may
be driven from standard 54/74 series and 54S/74S series
gates and flip-flops or from drivers such as the DS8830 or
DM7440. The DS0026 is intended for applications in which
the output pulse width is logically controlled; i.e., the output
pulse width is equal to the input pulse width.
The DS0026 is designed to fulfill a wide variety of MOS inter-
face requirements. Information on the correct usage of the
DS0026 in these as well as other systems is included in the
application note AN-76.
Connection Diagram (Top View)
5853 Version 6 Revision 3
5853
Dual-In-Line Package
DS0026
Print Date/Time: 2010/07/13 22:49:07
Features
Fast rise and fall times—20 ns 1000 pF load
High output swing—20V
High output current drive—±1.5 amps
TTL compatible inputs
High rep rate—5 to 10 MHz depending on power
dissipation
Low power consumption in MOS “0” state—2 mW
Drives to 0.4V of GND for RAM address drive
585302
OBSOLETE
www.national.com
July 13, 2010

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DS0026CN Summary of contents

Page 1

... The DS0026 is designed to fulfill a wide variety of MOS inter- face requirements. Information on the correct usage of the DS0026 in these as well as other systems is included in the application note AN-76. Connection Diagram (Top View) © 2010 National Semiconductor Corporation 5853 Version 6 Revision 3 DS0026 Features ■ Fast rise and fall times—20 ns 1000 pF load ■ ...

Page 2

... Differential Voltage Input Current Input Voltage (V ) − (V − Peak Output Current Ordering Information Order Number DS0026CN DS0026CMA DS0026CMM Electrical Characteristics Symbol Parameter V Logic “1” Input Voltage IH I Logic “1” Input Current IH V Logic “0” Input Voltage ...

Page 3

... Note 7: Derate N08E package 9.3 mW/°C for T A Typical V Connection BB Typical Performance Characteristics Input Current vs Input Voltage 585322 5853 Version 6 Revision 3 = 1000 pF, over the temperature range of 0°C to +70°C for the DS0026CN. L above 25°C. 585308 Supply Current vs Temperature 585323 3 Print Date/Time: 2010/07/13 22:49:07 − ...

Page 4

Rise Time vs Load Capacitance Recommended Input Coding Capacitance www.national.com 585325 585327 4 5853 Version 6 Revision 3 Print Date/Time: 2010/07/13 22:49:07 Fall Time vs Load Capacitance 585326 DC Power ( Duty Cycle 585328 ...

Page 5

Schematic Diagram AC Test Circuits and Switching Time Waveforms 5853 Version 6 Revision 3 1/2 DS0026 585312 FIGURE 1. 5 Print Date/Time: 2010/07/13 22:49:07 585310 585313 www.national.com ...

Page 6

Typical Applications AC Coupled MOS Clock Driver DC Coupled RAM Memory Address or Precharge Driver (Positive Supply Only) Application Hints DRIVING THE MM5262 WITH THE DS0026 CLOCK DRIVER The clock signals for the MM5262 have three requirements which have the ...

Page 7

Limiting the inductance of the clock lines can be accom- plished by minimizing their length and by laying out the lines such that the return current is closely coupled to the clock lines. When minimizing the length of clock lines ...

Page 8

Lastly, the clock lines must be considered as noise genera- tors. Figure 5 shows a clock coupled through a parasitic coupling capacitor eight data input lines being driven 7404. A parasitic lumped line inductance, ...

Page 9

... Physical Dimensions inches (millimeters) unless otherwise noted 5853 Version 6 Revision 3 Molded Dual-In-Line Package (N) Order Number DS0026CN NS Package Number N08E 8-Lead Small Outline Molded package (M) NS Package Number M08A 9 Print Date/Time: 2010/07/13 22:49:07 www.national.com ...

Page 10

Mini SOIC Package (MM) NS Package Number MU08A 10 5853 Version 6 Revision 3 Print Date/Time: 2010/07/13 22:49:07 ...

Page 11

Notes 11 5853 Version 6 Revision 3 Print Date/Time: 2010/07/13 22:49:07 www.national.com ...

Page 12

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