DS0026CN National Semiconductor, DS0026CN Datasheet
DS0026CN
Specifications of DS0026CN
DS0026
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DS0026CN Summary of contents
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... The DS0026 is designed to fulfill a wide variety of MOS inter- face requirements. Information on the correct usage of the DS0026 in these as well as other systems is included in the application note AN-76. Connection Diagram (Top View) © 2010 National Semiconductor Corporation 5853 Version 6 Revision 3 DS0026 Features ■ Fast rise and fall times—20 ns 1000 pF load ■ ...
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... Differential Voltage Input Current Input Voltage (V ) − (V − Peak Output Current Ordering Information Order Number DS0026CN DS0026CMA DS0026CMM Electrical Characteristics Symbol Parameter V Logic “1” Input Voltage IH I Logic “1” Input Current IH V Logic “0” Input Voltage ...
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... Note 7: Derate N08E package 9.3 mW/°C for T A Typical V Connection BB Typical Performance Characteristics Input Current vs Input Voltage 585322 5853 Version 6 Revision 3 = 1000 pF, over the temperature range of 0°C to +70°C for the DS0026CN. L above 25°C. 585308 Supply Current vs Temperature 585323 3 Print Date/Time: 2010/07/13 22:49:07 − ...
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Rise Time vs Load Capacitance Recommended Input Coding Capacitance www.national.com 585325 585327 4 5853 Version 6 Revision 3 Print Date/Time: 2010/07/13 22:49:07 Fall Time vs Load Capacitance 585326 DC Power ( Duty Cycle 585328 ...
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Schematic Diagram AC Test Circuits and Switching Time Waveforms 5853 Version 6 Revision 3 1/2 DS0026 585312 FIGURE 1. 5 Print Date/Time: 2010/07/13 22:49:07 585310 585313 www.national.com ...
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Typical Applications AC Coupled MOS Clock Driver DC Coupled RAM Memory Address or Precharge Driver (Positive Supply Only) Application Hints DRIVING THE MM5262 WITH THE DS0026 CLOCK DRIVER The clock signals for the MM5262 have three requirements which have the ...
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Limiting the inductance of the clock lines can be accom- plished by minimizing their length and by laying out the lines such that the return current is closely coupled to the clock lines. When minimizing the length of clock lines ...
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Lastly, the clock lines must be considered as noise genera- tors. Figure 5 shows a clock coupled through a parasitic coupling capacitor eight data input lines being driven 7404. A parasitic lumped line inductance, ...
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... Physical Dimensions inches (millimeters) unless otherwise noted 5853 Version 6 Revision 3 Molded Dual-In-Line Package (N) Order Number DS0026CN NS Package Number N08E 8-Lead Small Outline Molded package (M) NS Package Number M08A 9 Print Date/Time: 2010/07/13 22:49:07 www.national.com ...
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Mini SOIC Package (MM) NS Package Number MU08A 10 5853 Version 6 Revision 3 Print Date/Time: 2010/07/13 22:49:07 ...
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Notes 11 5853 Version 6 Revision 3 Print Date/Time: 2010/07/13 22:49:07 www.national.com ...
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