MC100E111FNR2 ON Semiconductor, MC100E111FNR2 Datasheet - Page 6

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MC100E111FNR2

Manufacturer Part Number
MC100E111FNR2
Description
IC CLOCK DRIVER 1:9 DIFF 28-PLCC
Manufacturer
ON Semiconductor
Series
100Er
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of MC100E111FNR2

Number Of Circuits
1
Ratio - Input:output
1:9
Differential - Input:output
Yes/Yes
Input
ECL, PECL
Output
ECL, PECL
Frequency - Max
800MHz
Voltage - Supply
4.2 V ~ 5.7 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Frequency-max
800MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Table 7. AC CHARACTERISTICS
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
13. 10 Series: V
14. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of
15. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
16. Enable is defined as the propagation delay from the 50% point of a negative transition on EN to the 50% point of a positive transition
17. The setup time is the minimum time that EN must be asserted prior to the next transition of IN/IN to prevent an output response greater
18. The hold time is the minimum time that EN must remain asserted after a negative going IN or a positive going IN to prevent an output
19. The release time is the minimum time that EN must be deasserted prior to the next IN/IN transition to ensure an output response that meets
20. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device.
f
t
t
t
t
t
t
t
V
t
Symbol
MAX
PLH
PHL
s
H
R
skew
JITTER
r
, t
PP
f
100 Series: V
the differential output signals.
on Q (or a negative transition on Q). Disable is defined as the propagation delay from the 50% point of a positive transition on EN to the
50% point of a negative transition on Q (or a positive transition on Q).
than $75 mV to that IN/IN transition (Figure 3).
response greater than $75 mV to that IN/IN transition (Figure 4).
the specified IN to Q propagation delay and output transition times (Figure 5).
EN
IN
IN
Q
Q
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
Figure 3. Setup Time
t
Maximum Toggle Frequency
Propagation Delay to Output
Setup Time (Note 17)
Hold Time (Note 18)
Release Time (Note 19)
Within-Device Skew (Note 20)
Random Clock Jitter (RMS)
Minimum Input Swing
Rise/Fall Time
s
50%
EE
EE
can vary −0.46 V / +0.06 V.
can vary −0.46 / +0.8 V.
Characteristic
≤ 75mV
IN (Diff) (Note 14)
Disable (Note 16)
IN (SE) (Note 15)
Enable (Note 16)
≤ 75mV
V
CCx
EN to IN
IN to EN
EN to IN
= 5.0 V; V
EN
IN
IN
Q
Q
EE
Min
430
380
400
400
250
350
250
50
50
http://onsemi.com
= 0.0 V or V
Figure 4. Hold Time
−40°C
−200
Typ
800
100
450
< 1
25
0
6
50%
CCx
t
h
Max
630
680
900
900
650
< 2
75
= 0.0 V; V
≤ 75mV
Min
430
380
450
450
200
300
275
50
0
≤ 75mV
EE
= −5.0 V (Note 13)
25°C
−200
Typ
800
100
375
< 1
25
0
Max
630
680
850
850
600
< 2
50
EN
IN
IN
Q
Q
Figure 5. Release Time
Min
430
380
450
450
200
300
275
50
0
50%
85°C
−200
t
r
Typ
800
100
375
< 1
25
0
Max
630
680
850
850
600
< 2
50
MHz
Unit
mV
ps
ps
ps
ps
ps
ps
ps

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