SKY72302-21 Skyworks Solutions Inc, SKY72302-21 Datasheet - Page 11

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SKY72302-21

Manufacturer Part Number
SKY72302-21
Description
IC SYNTHESIZER 6.1GHZ 28-EPTSSOP
Manufacturer
Skyworks Solutions Inc
Type
Fractional N Synthesizerr
Datasheet

Specifications of SKY72302-21

Pll
Yes
Input
Clock, Crystal
Output
Clock, Crystal
Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
Yes/Yes
Frequency - Max
6.1GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 3.3 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
Frequency-max
6.1GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
863-1079-2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SKY72302-21
Manufacturer:
SKYWORKS/思佳讯
Quantity:
20 000
The Auxiliary Dividend Register controls the fraction part of the
desired fractional-N value and allows an offset of –0.5 to +0.5 to
the auxiliary integer selected through the Auxiliary Divider
Register. As shown in Figure 10, the value to be loaded is:
General Synthesizer Registers
The dual-programmable reference frequency dividers provide the
reference frequencies to the phase detectors by dividing the
crystal oscillator frequency. The lower five bits hold the reference
frequency divide index for the main phase detector. The next five
bits hold the reference frequency divide index for the auxiliary
phase detector. Divide ratios from 1 to 32 are possible for each
reference frequency divider (see Tables 2 and 3).
Table 2. Programming the Main Reference Frequency Divider
Table 3. Programming the Auxiliary Reference Frequency Divider
Auxiliary Synthesizer Dividend = Ten-bit value for the auxiliary
synthesizer dividend.
Decimal
Decimal
31
31
0
1
2
0
1
2
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
101216L • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • September 9, 2009
A3
0
A2
1
Bit 4 (MSB)
Bit 9 (MSB)
A1
0
0
0
0
1
0
0
0
1
A0
0
11
X
10
X MSB
Figure 10. Auxiliary Dividend Register (Write Only)
9
Bit 3
Bit 8
0
0
0
1
0
0
0
1
8
7
6
5
Bit 2
Bit 7
0
0
0
1
0
0
0
1
4
The Reference Frequency Dividers Register configures the dual-
programmable reference frequency dividers for the main and
auxiliary synthesizers. As shown in Figure 11, the values to be
loaded are:
Main Reference Frequency Divider Index = Desired main
oscillator frequency division ratio –1. Default value on power-up
is 0, signifying that the reference frequency is not divided for
the main phase detector.
Auxiliary Reference Frequency Divider Index = Desired auxiliary
oscillator frequency division ratio –1. Default value on power-up
is 0, signifying that the reference frequency is not divided for
the auxiliary phase detector.
3
2
DATA SHEET • SKY72302-21 FREQUENCY SYNTHESIZER
1
Bit 1
Bit 6
LSB
0
0
1
1
0
0
1
1
0
Auxiliary Synthesizer Dividend
Bit 0 (LSB)
Bit 5 (LSB)
0
1
0
1
0
1
0
1
C1421
Reference Divider
Reference Divider
Ratio
Ratio
32
32
1
2
3
1
2
3
11

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