ICS525R-02 IDT, Integrated Device Technology Inc, ICS525R-02 Datasheet - Page 4

• Manufacturer Part Number: ICS525R-02
• Description: IC CLOCK USER CONFIGURE 28-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: OSCaR™r
• Type: Clock Generator, Fanout Distributionr

Specifications of ICS525R-02

• Pll: Yes with Bypass
• Input: Clock, Crystal
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 250MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Frequency-max: 200MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 525R-02

MDS 525-01/02 T
External Components/Crystal
Selection
Decoupling Capacitors
The ICS525-01/02 requries two 0.01µF decoupling
capacitors to be connected between VDD and GND,
one on each side of the chip. The capacitor must be
connected close to the device to minimize lead
inductance. No external power supply filtering is
required for this device.
External Resistors
A 33 series terminating resistor can be used next to
the CLK and REF pins.
Crystal Load Capacitors
The approximate total on-chip capacitance for a crystal
is 16 pF, so a parallel resonant, fundamental mode
crystal with this value of load (correlation) capacitance
should be used. For crystals with a specified load
capacitance greater than 16 pF, crystal capacitors may
be connected from each of the pins X1 and X2 to
Ground as shown in the block diagram. The value (in
pF) of these crystal caps should be (CL -16)*2, where
CL is the crystal load capacitance in pF. These external
capacitors are only required for applications where the
exact frequency is critical. For a clock input, connect to
X1 and leave X2 unconnected (no capacitors on
either).
Determining the Output Frequency
Users have full control in setting the desired output
frequency over the range shown in the table on page 2.
To replace a standard oscillator, users should connect
the divider select input pins directly to ground (or VDD,
although this is not required because of internal
pull-ups) during Printed Circuit Board layout. The
ICS525-01/02 will automatically produce the correct
clock when all components are soldered. It is also
possible to connect the inputs to parallel I/O ports to
switch frequencies. By choosing divides carefully, the
number of inputs which need to be changed can be
minimized. Observe the restrictions on allowed values
of VDW and RDW.
Integrated Device Technology, Inc.
4
ICS525-01 Settings
The output of the ICS525-01 can be determined by the
following simple equation:
Where:
Reference Divider Word (RDW) = 1 to 127 (0 not
permitted)
VCO Divider Word (VDW) = 4 to 511 (0, 1, 2, 3 not
permitted)
Output Divider (OD) = values on page 3
Also, the following operating ranges should be
observed:
ICS525-02 Settings
The output of the ICS525-02 can be determined by the
following simple equation:
Where:
Reference Divider Word (RDW) = 0 to 127
VCO Divider Word (VDW) = 0 to 511
Output Divider (OD) = values on page 3
Also, the following operating ranges should be
observed:
See table on page 3 for full details of maximum
output.
See table on page 3 for full details of maximum
output.
30M
200kHz
200kHz
30M
CLK
CLK
●
<
<
www.idt.com
Input Frequency
Input Frequency
Frequency
Frequency
<
<
InputFrequency
---------------------------------------------- -
InputFrequency
---------------------------------------------- -
RDW
RDW
=
=
+
+
OSCaR
Input Frequency
Input Frequency
2
2
x2x
x2x
------------------------------ -
------------------------------ -
VDW
RDW
VDW
RDW
TM
+
+
+
+
User Configurable Clock
8
2
8
2
<
2x
<
2x
240
200M
-------------------------------------------- -
-------------------------------------------- -
RDW
RDW
M
VDW
VDW
3.3
3.3
Revision 081810
+
+
ICS525-01/02
2
2
V or
V or
+
+
8
8
OD
OD
320
400
M
M
5
5
v
v