DS1085LZ-25B2+ Maxim Integrated Products, DS1085LZ-25B2+ Datasheet
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DS1085LZ-25B2+
Specifications of DS1085LZ-25B2+
Related parts for DS1085LZ-25B2+
DS1085LZ-25B2+ Summary of contents
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... DEVICE PACKAGE DS1085LZ-5 150mil SO DS1085LZ-12 150mil SO DS1085LZ-25 150mil SO DESCRIPTION The DS1085L is a dual-output frequency synthesizer requiring no external timing components for operation. It can be used as a standalone oscillator dynamically programmed, processor-controlled peripheral device. An internal master oscillator can be programmed from 33MHz to 66MHz with three resolution options of 5kHz, 12 ...
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External control inputs, CTRL1 and CTRL0, enable or disable the two oscillator outputs. Both outputs feature a synchronous enable that ensures no output glitches when the output is enabled and a constant time interval (for a given frequency setting) from ...
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... PART NUMBER DS1085LZ-5 DS1085LZ-12 DS1085LZ-25 For further description of use of the OFFSET register see the REGISTER FUNCTIONS section. The master clock can be routed directly to the outputs (OUT0 and OUT1) or through separate prescalers (P0 and P1). In the case of OUT1, an additional programmable divider (N) can be used to generate frequencies down to 4 ...
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Table 2. DEVICE MODE USING OUT0 EN0 SEL0 PDN0 (BIT) (BIT) (BIT This mode is for applications where OUT0 is not ...
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... The OFFSET byte (O0–O4) determines the range of frequencies that can be obtained within the absolute minimum and maximum range of the oscillator. Correct operation of the device is not guaranteed for values of OFFSET not shown in Table 6. LSB MSB DS1085LZ-12 Frequency DAC Offset 52.3MHz 600 Second Data Byte DS1085LZ-25 Frequency DAC OS 50.9MHz 500 O2 O1 LSB X X Offset OS LSB O0 ...
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... EN0 0M1 0M0 DS1085LZ-25 FREQUENCY RANGE — — — — 19.2 to 44.8 22.4 to 48.0 25.6 to 51.2 28.8 to 54.4 32.0 to 57.6 35.2 to 60.8 38.4 to 64.0 41.6 to 67.2 44.8 to 70.4 48 ...
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The functions of the individual bits are described in the following paragraphs. DIV1 (Default Setting = 0) This bit allows the output of the prescaler routed directly to the OUT1 pin (DIV1 = 1). In this condition, ...
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Table 7a. PRESCALER P0 DIVISOR M SETTINGS 0M1 0M0 PRESCALER P0 DIVISOR “M” *Factory Default Setting Table 7b. PRESCALER P1 DIVISOR M SETTINGS 1M1 1M0 PRESCALER P1 DIVISOR “M” ...
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N The DIV word sets the programmable divider. These 10 bits (N0–N9) determine the value of the programmable divider (N). The range of divisor values is from two to 1025, and is equal to the programmed value of N plus ...
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COMMAND SET Data and control information is read from and written to the DS1085L in the format shown in Figure 3. To write to the DS1085L, the master issues the slave address of the DS1085L and the R/ After receiving ...
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Access RANGE [37h the next data bytes read are the values stored in the RANGE register. This register has a 14- W bit value. The upper eight bits are sent first, followed by a second byte ...
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SERIAL DATA BUS The DS1085L communicates through a 2-wire serial interface. A device that sends data onto the bus is defined as a transmitter, and a device receiving data as a receiver. The device that controls the message is ...
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A master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the data line HIGH ...
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SLAVE ADDRESS A control byte is the first byte received following the START condition from the master device. The control byte consists of a 4-bit control code; for the DS1085L, this is set as 1011 binary for read and write ...
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Figure 4. 2-WIRE SERIAL COMMUNICATION WITH DS1085L ...
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ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Range Storage Temperature Range Soldering Temperature * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated ...
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MASTER OSCILLATOR CHARACTERISTICS PARAMETER SYMBOL Master Oscillator Range Default Master Oscillator Frequency Master Oscillator Frequency Tolerance Voltage Frequency Variation Temperature Frequency Variation Integral Nonlinearity of Frequency DAC AC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL Frequency Stable After DIV Change Frequency Stable After ...
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AC ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE PARAMETER SYMBOL SCL Clock Frequency Bus Free Time Between a STOP and START Condition Hold Time (Repeated) START Condition LOW Period of SCL HIGH Period of SCL Setup Time for a Repeated START Data Hold ...
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DAC and OFFSET register settings must be configured to maintain the clock frequency within this range. Correct operation of the device is not guaranteed if these limits are exceeded. 8) Frequency settles faster for small charges in value. During ...
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TYPICAL OPERATING CHARACTERISTICS SUPPLY CURRENT vs. TEMPERATURE EMPERAT URE (°C) SUPPLY CURRENT vs. DIVISOR ...
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TYPICAL OPERATING CHARACTERISTICS (continued) SUPPLY CURRENT vs. DAC SETTING AND OFFSET OS+1 OS 200 400 600 800 DAC SETTING FREQUENCY % CHANGE vs. SUPPLY VOLTAGE 2.0 DS1085L-12 1.5 DS1085L-05 1.0 ...