MC100LVEL38DWR2G ON Semiconductor, MC100LVEL38DWR2G Datasheet - Page 6

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MC100LVEL38DWR2G

Manufacturer Part Number
MC100LVEL38DWR2G
Description
IC CLOCK GEN ECL 2:1 4/6 20-SOIC
Manufacturer
ON Semiconductor
Series
100LVELr
Type
Clock Generatorr
Datasheet

Specifications of MC100LVEL38DWR2G

Pll
No
Input
HSTL, NECL, PECL
Output
ECL
Number Of Circuits
1
Ratio - Input:output
1:4
Differential - Input:output
Yes/Yes
Frequency - Max
1.2GHz
Divider/multiplier
Yes/No
Voltage - Supply
±3 V ~ 3.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Frequency-max
1GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
ORDERING INFORMATION
Specifications Brochure, BRD8011/D.
MC100LVEL38DW
MC100LVEL38DWG
MC100LVEL38DWR2
MC100LVEL38DWR2G
Device
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Figure 5. Typical Termination for Output Driver and Device Evaluation
Driver
Device
Q
Q
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
(Pb−Free)
(Pb−Free)
SOIC−20
SOIC−20
SOIC−20
SOIC−20
Package
− ECL Clock Distribution Techniques
− Designing with PECL (ECL at +5.0 V)
− ECLinPS I/O SPiCE Modeling Kit
− Metastability and the ECLinPS Family
− Interfacing Between LVDS and ECL
− The ECL Translator Guide
Z
Z
http://onsemi.com
o
o
= 50 W
= 50 W
50 W
V
6
TT
= V
V
CC
TT
− 2.0 V
50 W
D
D
1000 / Tape & Reel
1000 / Tape & Reel
38 Units / Rail
38 Units / Rail
Package
Receiver
Device

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