ADF4206BRU-REEL7 Analog Devices Inc, ADF4206BRU-REEL7 Datasheet - Page 4

• Manufacturer Part Number: ADF4206BRU-REEL7
• Description: IC PLL FREQ SYNTHESIZER 16-TSSOP
• Manufacturer: Analog Devices Inc
• Type: Clock/Frequency Synthesizer (RF)r

Specifications of ADF4206BRU-REEL7

• Rohs Status: RoHS non-compliant
• Pll: Yes
• Input: CMOS
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 3:1
• Differential - Input:output: Yes/No
• Frequency - Max: 550MHz
• Divider/multiplier: No/No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 550MHz

ADF4206/ADF4208
1
2
3
4
5
6
7
8
Operating temperature range for B version: −40°C to +85°C.
The B chip specifications are given as typical values.
This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency that
is less than this value.
AC coupling ensures AV
Guaranteed by design. Sample tested to ensure compliance.
Typical values apply for V
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider
value) and 10 log F
The phase noise is measured at 1 kHz, unless otherwise noted. The phase noise is measured with the EVAL-ADF4206EB or the EVAL-ADF4208EB evaluation board and
the HP8562E spectrum analyzer. The spectrum analyzer provides the REFIN for the synthesizer (f
POWER SUPPLIES
NOISE CHARACTERISTICS
Parameter
I
V
V
V
I
I
I
Low Power Sleep Mode
Normalized Phase Noise Floor
(RF1)
Phase Noise Performance
Spurious Signals
P
DD
DD
DD
DD
DD
P
(I
ADF4206
ADF4208
ADF4206
ADF4208
ADF4206
ADF4208
ADF4206
ADF4208
ADF4206 (RF1, RF2)
ADF4208 (RF1)
ADF4208 (RF1)
RF1, RF2 (20 kHz Loop B/W)
1
2
(I
P
1
2
1 + I
DD
7
1 + I
P
2)
DD
2)
PFD
6
. PN
DD
SYNTH
DD
/2 bias. V
= 3 V; P = 32; RF1
= PN
8
TOT
DD
1 = V
− 10 log F
DD
2 = 3 V; For V
IN
1/RF2
PFD
B Version
2.7/5.5
V
V
14
21
8
14
7.5
9
1
0.5
−213
−217
−92
−85
−91
−80/−84
− 20 log N.
IN
DD
DD
2 for ADF4206 = 540 MHz; RF1
1
1/6.0
DD
1 = V
1
DD
2 = 5 V, use CMOS-compatible levels.
Rev. A | Page 4 of 24
B Chips
2.7/5.5
V
V
14
21
8
14
7.5
9
1
0.5
−213
−217
−92
−85
−91
−80/−84
DD
DD
1
1/6.0
IN
2
1/RF2
IN
2 for ADF4208 = 900 MHz.
REFOUT
Unit
V min/V max
V min/V max
mA max
mA max
mA max
mA max
mA max
mA max
mA max
μA typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dB typ
= 10 MHz @ 0 dBm).
Test Conditions/Comments
V
9.5 mA typical at V
14 mA typical at V
5.5 mA typical at V
9 mA typical at V
5 mA typical at V
5.5 mA typical at V
T
@ VCO output
@ 540 MHz output, 200 kHz at PFD
@ 1750 MHz output, 200 kHz at PFD
@ 900 MHz output, 200 kHz at PFD
@ 200 kHz/400 kHz offsets and
200 kHz PFD
A
DD
= 25°C
1, V
DD
2 ≤ V
P
1, V
DD
DD
DD
P
DD
DD
DD
2 ≤ 6.0 V
= 3 V, T
= 3 V, T
= 3 V, T
= 3 V, T
= 3 V, T
= 3 V, T
A
A
A
= 25°C
= 25°C
A
A
A
= 25°C
= 25°C
= 25°C
= 25°C