LMX1511TMX National Semiconductor, LMX1511TMX Datasheet - Page 19

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LMX1511TMX

Manufacturer Part Number
LMX1511TMX
Description
IC FREQ SYNTHESZR 1.1GHZ 20TSSOP
Manufacturer
National Semiconductor
Series
PLLatinum™r
Type
PLL Frequency Synthesizerr
Datasheet

Specifications of LMX1511TMX

Pll
Yes
Input
CMOS, TTL
Output
Clock
Number Of Circuits
1
Ratio - Input:output
2:1
Differential - Input:output
Yes/No
Frequency - Max
1.1GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Frequency-max
1.1GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*LMX1511TMX

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Application Information
EXTERNAL CHARGE PUMP
The LMX PLLatimum series of frequency synthesizers are
equipped with an internal balanced charge pump as well as
outputs for driving an external charge pump Although the
superior performance of NSC’s on board charge pump elim-
inates the need for an external charge pump in most appli-
cations certain system requirements are more stringent In
these cases using an external charge pump allows the de-
signer to take direct control of such parameters as charge
pump voltage swing current magnitude TRI-STATE leak-
age and temperature compensation
One possible architecture for an external charge pump cur-
rent source is shown in Figure 9 The signals
the diagram correspond to the phase detector outputs of
the LMX1501 1511 frequency synthesizers These logic
signals are converted into current pulses using the circuitry
shown in Figure 9 to enable either charging or discharging
of the loop filter components to control the output frequency
of the PLL
Referring to Figure 9 the design goal is to generate a 5 mA
current which is relatively constant to within 5V of the power
supply rail To accomplish this it is important to establish as
large of a voltage drop across R5 R8 as possible without
saturating Q2 Q4 A voltage of approximately 300 mV pro-
vides a good compromise This allows the current source
reference being generated to be relatively repeatable in the
absence of good Q1 Q2 Q3 Q4 matching (Matched tran-
sistor pairs is recommended ) The
rated for a maximum output load current of 1 mA while 5 mA
current sources are desired The voltages developed across
R4 9 will consequently be approximately 258 mV or 42 mV
k
mA 1 mA) through the Q1 Q2 Q3 Q4 pairs
In order to calculate the value of R7 it is necessary to first
estimate the forward base to emitter voltage drop (Vfn p) of
the transistors used the V
of
k
Knowing these parameters along with the desired current
allow us to design a simple external charge pump Separat-
ing the pump up and pump down circuits facilitates the no-
dal analysis and give the following equations
R
R
R
R
R
R
R8 5 due to the current density differences 0 026 1n (5
0 1V )
4
9
5
8
6
7
r’s under 1 mA loads ( p’s V
e
e
e
e
e
e
V
V
i
i
(V
(V
p max
r max
R5
R8
p
P
b
b
V
b
b
V
R8
V
V
R5
V
V
(
(
VOL p
VOH r
T
T
i
source
n
i
p
(
sink
a
(
a
1n
1n
i
n
p max
i
max
p
1)
)
)
a
1)
b
b
a
i
i
i
source
n max
b
p max
i
b
1)
sink
OL
(V
(V
1)
i
i
sink
source
R5
R8
drop of p and the V
a
a
OL k
Vfp)
Vfn)
p and
(Continued)
0 1V and
r outputs are
p
and
OH
r s V
drop
r
OH
in
19
EXAMPLE
Typical Device Parameters
Typical System Parameters
Design Parameters
Therefore select
R
R
R
R
4
5
8
6
e
e
e
e
R
1 0 mA (50
1 0 mA (100
R
9
7
e
e
0 3V
(5V
0 3V (50
0 3V (100
b
b
0 1V)
a
0 026 1n(5 0 mA 1 0 mA)
a
1)
FIGURE 9
a
1)
1 0 mA
b
b
b
b
1)
5 mA
1)
5 0 mA
(0 3V
V
V
V
I
V
I
V
V
SINK
rmax
5 0 mA
n
P
cntl
fn
R8
OL p
p
e
e
e
e
e
e
100
e
a
e
5 0V
V
e
e
0 0V V
V
0 5V
fp
e
0 8V)
I
I
pmax
R5
SOURCE
332
V
e
315 6
OH r
p
e
b
0 8V
e
e
e
0 3V
r
4 5V
50
TL W 12340– 46
3 8 k
e
1 mA
e
e
e
100 mV
5 0V
5 0 mA
51 6

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