SI4122G-BM Silicon Laboratories Inc, SI4122G-BM Datasheet
SI4122G-BM
Specifications of SI4122G-BM
Related parts for SI4122G-BM
SI4122G-BM Summary of contents
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Features Dual-band RF Synthesizers ...
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Si4133G 2 Rev. 1.4 ...
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Section Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . ...
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Si4133G Electrical Specifications Table 1. Recommended Operating Conditions Parameter Ambient Temperature Supply Voltage Supply Voltages Difference Note: All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at 3.0 V and an operating ...
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Table 3. DC Characteristics (V = 2 – ° Parameter 1 Typical Supply Current 1 RF1 Mode Supply Current 1 RF2 Mode Supply Current 1 IF Mode Supply Current Standby Current ...
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Si4133G Table 4. Serial Interface Timing (V = 2 – ° Parameter SCLK Cycle Time SCLK Rise Time SCLK Fall Time SCLK High Time SCLK Low Time 2 SDATA Setup ...
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SCLK SDATA D17 t en1 SEN Figure 2. Serial Interface Timing Diagram First bit c loc ked hold D16 D15 ...
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Si4133G Table 5. RF and IF Synthesizer Characteristics (V = 2 – ° Parameter XIN Input Frequency Reference Amplifier Sensitivity Phase Detector Update Frequency RF1 Center Frequency Range RF2 Center ...
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RF and IF synthesizers settled to within 0.1 ppm frequency error. t pup PWDN SEN PDIB = 1 SDATA PDRB = 1 Figure 4. Software Power Management Timing Diagram RF and IF synthesizers settled to within 0.1 ...
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Si4133G TRACE A: Ch1 FM Gate Time A Offset 800 Hz Real 160 Hz /div -800 Hz Start Figure 6. Typical Transient Response RF1 at 1.6 GHz with 200 kHz Phase Detector Update Frequency 10 133.59375 us Stop: ...
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Offset Frequency (Hz) Figure 7. Typical RF1 Phase Noise at 1.6 GHz with 200 kHz Phase Detector Update Frequency Figure 8. Typical RF1 Spurious Response at 1.6 ...
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Si4133G −60 −70 −80 −90 −100 −110 −120 −130 −140 2 10 Figure 9. Typical RF2 Phase Noise at 1.2 GHz with 200 kHz Phase Detector Update Frequency Figure 10. Typical RF2 Spurious Response at 1.2 GHz with 200 kHz ...
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Offset Frequency (Hz) Figure 11. Typical IF Phase Noise at 550 MHz with 200 kHz Phase Detector Update Frequency Figure 12. IF Spurious Response at 550 MHz ...
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Si4133G Typical Application Circuits From System Controller Printed Trace Inductors 560 RFOUT µF 0.022 From System Controller 1 GNDR 2 RFLD 3 RFLC Printed Trace 4 GNDR Inductors 5 RFLB 6 RFLA 7 GNDR V DD PWDN ...
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Functional Description The Si4133G is a monolithic integrated circuit that performs IF and dual-band RF synthesis for wireless applications such as GSM 850, E-GSM 900, DCS 1800, and PCS 1900. Its fast transient response also makes the Si4133G especially well ...
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Si4133G Table 6. Si4133G-BT VCO Characteristics VCO F Range C L CEN NOM PKG (MHz) (pF) (nH) Min Max RF1 947 1720 4.3 2.0 RF2 789 1429 4.8 2.3 IF 526 952 6.5 2.1 Table 7. Si4133G-BM VCO Characteristics VCO ...
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RF PLL nears the limit of its compensation range LDETB is also high when either PLL is executing the self-tuning algorithm. The output frequency is still locked when LDETB goes high, but the PLL eventually loses lock if the ...
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Si4133G 560 pF IFOUT L MATCH Figure 17. IFOUT 50 Ω Test Circuit Table 8. L Values MATCH Frequency 500–600 MHz 600–800 MHz 800–1 GHz The IF output level is dependent upon the load. Figure 18 displays the output level ...
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Table 9. Powerdown Configuration PWDN Pin AUTOPDB PDIB x x PWDN = PWDN = Rev. 1.4 Si4133G RF PDRB IF Circuitry Circuitry x OFF OFF 0 OFF OFF ...
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Si4133G Control Registers Register Name Bit Bit Main 0 0 Configuration 1 Reserved 2 Powerdown RF1 N-Divider 4 RF2 N-Divider N-Divider Reserved . . . 15 Reserved Note: ...
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Register 0. Main Configuration Address Field = A[3:0] = 0000 Bit D17 D16 D15 D14 D13 D12 D11 D10 D9 Name AUXSEL Bit Name 17:14 Reserved 13:12 AUXSEL [1:0] 11:6 Reserved 5 LPWR 4 Reserved 3 ...
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... PDIB 0 PDRB Register 3. RF1 N-Divider Address Field (A[3:0]) = 0011 Bit D17 D16 D15 D14 D13 D12 D11 D10 Name Bit Name 17:0 N [17:0] N-Divider for RF1 Synthesizer. RF1 Register reserved for Si4122G. Writes to this register can result in unpredictable behavior Function Program to zero. ...
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Register 4. RF2 N-Divider Address Field = A[3:0] = 0100 Bit D17 D16 D15 D14 D13 D12 D11 D10 Name 0 Bit Name 17 Reserved Program to zero. 16:0 N [16:0] N-Divider for RF2 Synthesizer. RF2 Register reserved for Si4123G. ...
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Si4133G Pin Descriptions: Si4133G-BT Pin Number Name Description 1 SCLK Serial clock input 2 SDATA Serial data input 3 GNDR Common ground for RF analog circuitry 4 RFLD Pins for inductor connection to RF2 VCO 5 RFLC Pins for inductor ...
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... Table 11. Pin Descriptions for Si4133G Derivatives—TSSOP Pin Number Si4133G-BT Si4123G-BT Si4122G-BT Si4113G-BT 1 SCLK SCLK 2 SDATA SDATA 3 GNDR GNDR 4 RFLD GNDR 5 RFLC GNDR 6 GNDR GNDR 7 RFLB RFLB 8 RFLA RFLA 9 GNDR GNDR 10 GNDR GNDR 11 RFOUT RFOUT 12 VDDR VDDR 13 AUXOUT AUXOUT 14 PWDN PWDN ...
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Si4133G Pin Descriptions: Si4133G-BM Pin Number Name Description 1 GNDR Common ground for RF analog circuitry 2 RFLD Pins for inductor connection to RF2 VCO 3 RFLC Pins for inductor connection to RF2 VCO 4 GNDR Common ground for RF ...
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... Table 12. Pin Descriptions for Si4133G Derivatives—MLP Pin Number Si4133G-BM Si4123G-BM Si4122G-BM Si4113G-BM 1 GNDR GNDR 2 RFLD GNDR 3 RFLC GNDR 4 GNDR GNDR 5 RFLB RFLB 6 RFLA RFLA 7 GNDR GNDR 8 GNDR GNDR 9 GNDR GNDR 10 RFOUT RFOUT 11 VDDR VDDR 12 AUXOUT AUXOUT 13 PWDN PWDN 14 GNDD GNDD ...
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... Number Si4133G-BT* Si4133G-BM Si4123G-BT* Si4123G-BM Si4122G-BT* Si4122G-BM Si4113G-BT* Si4113G-BM *Note: TSSOP not recommended for new designs. Si4133G Derivative Devices The Si4133G performs both IF and dual-band RF frequency synthesis. The Si4113G, Si4122G, and the Si4123G are derivatives of this device. Table 13 outlines which synthesizers each derivative device features as well as which pins and registers coincide with each synthesizer ...
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Package Outline: Si4133G-BT Figure 19 illustrates the package details for the Si4133G-BT. Table 14 lists the values for the dimensions shown in the illustration. D γ Figure 19. 24-Pin Thin Shrink Small Outline Package (TSSOP) Table 14. Package Diagram Dimensions ...
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Si4133G Package Outline: Si4133G-BM Figure 20 illustrates the package details for the Si4133G-BM. Table 15 lists the values for the dimensions shown in the illustration D TOP VIEW Figure 20. 28-Pin Micro ...
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Document Change List Revision 1.3 to Revision 1.4 TSSOP outline updated. Rev. 1.4 Si4133G 31 ...
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