DS1110S-80+ Maxim Integrated Products, DS1110S-80+ Datasheet - Page 6
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DS1110S-80+
Manufacturer Part Number
DS1110S-80+
Description
DELAY LINE 10-TAP 16-SOIC
Manufacturer
Maxim Integrated Products
Datasheet
1.DS1110S-60.pdf
(8 pages)
Specifications of DS1110S-80+
Number Of Taps/steps
10
Function
Tapped
Delay To 1st Tap
8nS
Tap Increment
8nS
Available Total Delays
80ns
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Independent Delays
-
Period: The time elapsed between the leading edge of
the first pulse and the leading edge of the following pulse.
t
between the 1.5V point on the leading edge and the
1.5V point on the trailing edge, or the 1.5V point on the
trailing edge and the 1.5V point on the leading edge.
t
20% and the 80% point on the leading edge of the
input pulse.
t
80% and the 20% point on the trailing edge of the
input pulse.
10-Tap Silicon Delay Line
Figure 3. Test Circuit
6
RISE
FALL
WI
______________________________________________________________________
(Pulse Width): The elapsed time on the pulse
(Input Rise Time): The elapsed time between the
(Input Fall Time): The elapsed time between the
GENERATOR
DEVICE UNDER TEST
PULSE
Terminology
CONTROL UNIT
VHF SWITCH
t
the 1.5V point on the leading edge of the input pulse
and the 1.5V point on the leading edge of any tap out-
put pulse.
t
the 1.5V point on the trailing edge of the input pulse
and the 1.5V point on the trailing edge of any tap out-
put pulse.
Figure 3 illustrates the hardware configuration used for
measuring the timing parameters on the DS1110. A
precision pulse generator under software control pro-
duces the input waveform. Time delays are measured
by a time interval counter (20ps resolution) connected
PLH
PHL
Z0 = 50Ω
(Time Delay, Rising): The elapsed time between
(Time Delay, Falling): The elapsed time between
START
STOP
INTERVAL
COUNTER
Test Setup Description
TIME