DS1020S-50 Maxim Integrated Products, DS1020S-50 Datasheet - Page 8
![DELAY PROG 8-BIT 0.50NS 16-SOIC](/photos/5/17/51709/175-16-soic_w__sml.jpg)
DS1020S-50
Manufacturer Part Number
DS1020S-50
Description
DELAY PROG 8-BIT 0.50NS 16-SOIC
Manufacturer
Maxim Integrated Products
Datasheet
1.DS1020S-15.pdf
(9 pages)
Specifications of DS1020S-50
Number Of Taps/steps
256
Function
Programmable
Delay To 1st Tap
10nS
Tap Increment
0.5nS
Available Total Delays
137.5ns
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Independent Delays
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS1020S-50
Manufacturer:
DALLAS
Quantity:
9
Part Number:
DS1020S-50
Manufacturer:
MAXIM/美信
Quantity:
20 000
TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
t
1.5V point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V point on the leading
edge.
t
input pulse.
t
input pulse.
t
pulse and the 1.5V point on the leading edge of the output pulse.
t
pulse and the 1.5V point on the trailing edge of the output pulse.
TIMING DIAGRAM: NON-LATCHED PARALLEL MODE (S = 1, E = 1) Figure 6
TIMING DIAGRAM: LATCHED PARALLEL MODE (S=1) Figure 7
WI
RISE
FALL
PLH
PHL
(Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the
(Time Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input
(Time Delay, Falling): The elapsed time between the 1.5V point on the trailing edge of the input
(Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
(Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
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