LTC6992CS6-2#TRMPBF Linear Technology, LTC6992CS6-2#TRMPBF Datasheet - Page 20
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LTC6992CS6-2#TRMPBF
Manufacturer Part Number
LTC6992CS6-2#TRMPBF
Description
IC TIMERBLOX VOLT PWM TSOT23-6
Manufacturer
Linear Technology
Datasheet
1.LTC6992CDCB-1TRMPBF.pdf
(32 pages)
Specifications of LTC6992CS6-2#TRMPBF
Frequency
*
Voltage - Supply
*
Current - Supply
365µA
Operating Temperature
*
Package / Case
TSOT-23-6, TSOT-6
Count
*
No. Of Timers
1
Clock External Input
No
Supply Voltage Range
2.25V To 5.5V
Digital Ic Case Style
TSOT-23
No. Of Pins
6
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LTC6992CS6-2#TRMPBFTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIONS INFORMATION
LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
Step 4: Select R
Calculate the correct value for R
Since 625k is not available as a standard 1% resistor,
substitute 619k if a 0.97% frequency shift is acceptable.
Otherwise, select a parallel or series pair of resistors such
as 309k and 316k to attain a more precise resistance.
The completed design is shown in Figure 7.
Duty Cycle Sensitivity to ΔV
The output duty cycle is proportional to the ratio of V
V
effectively gain or attenuate V
ΔV
For many designs, the absolute V
is not critical. For others, making the simplifying assump-
tion of ΔV
duty cycle error, which increases with V
maximum of 3.4% if ΔV
Figure 8 demonstrates the worst-case impact of this varia-
tion (if V
20
SET
R
SET
D =
ΔD ≅
. Since V
SET
is added to the equation.
0.8 • V
V
MOD
=
SET
800mV
V
1MHz • 50k
SET
MOD
4 • 20kHz
(
is at its 0.97V or 1.03V limits).
R
625k
SET
SET
Figure 7. 20kHz PWM Oscillator
SET
V
= 0V creates the potential for additional
MOD
MOD
GND
SET
SET
•
LTC6992-4
can vary up to ±30mV from 1V it can
+ ΔV
ΔV
V
SET
SET
= 625k
6992 F07
OUT
SET
DIV
SET
V
+
≅ − D
)
= –30mV.
SET
−
MOD
⎛
⎝ ⎜
8
1
MOD
SET
ideal
, as shown below when
2.25V TO 5.5V
to duty cycle accuracy
using Equation (1b).
+
8
1
DIVCODE = 1
R1
976k
R2
102k
MOD
⎞
⎠ ⎟
•
ΔV
, reaching a
V
SET
SET
MOD
/
This error is in addition to the inherent PWM duty cycle
accuracy spec ΔD (±4.5%), so care should be taken if ac-
curacy at high duty cycles (V
Sensitivity to ΔV
proportional to V
circuit for generating an arbitrary duty cycle. The equation
for duty cycle does not depend on V
Figure 9. Fixed-Frequency, Arbitrary Duty Cycle Oscillator
Figure 8. Duty Cycle Variation Due to ΔV
100
90
80
70
60
50
40
30
20
10
0
0
R
R
SET1
SET2
SET
SET
0.2
MOD
GND
SET
. For example, Figure 9 shows a simple
LTC6992-X
can be eliminated by making V
D
5
4
0.4
V
ΔV
•
6992 F09
MOD
OUT
R
DIV
SET
SET1
V
+
R
MOD
(V)
ΔV
= –30mV
SET2
0.6
SET
R
SET2
= 30mV
near 0.9V) is critical.
ΔV
SET
0.8
SET
8
1
2.25V TO 5.5V
= 0mV
6992 F08
at all.
R1
R2
1
SET
69921234f
MOD