DS1340C-33# Maxim Integrated Products, DS1340C-33# Datasheet - Page 9

• Manufacturer Part Number: DS1340C-33#
• Description: IC RTC I2C W/CHARGER 16-SOIC
• Manufacturer: Maxim Integrated Products
• Type: Clock/Calendar/Trickle-Chargerr

Specifications of DS1340C-33#

• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.97 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Function: Clock/Calendar/Trickle Charger
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.97 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (I2C)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

binary-coded decimal (BCD) format. The day-of-week
register increments at midnight. Values that correspond
to the day of week are user-defined but must be
sequential (i.e., if 1 equals Sunday, then 2 equals
Monday, and so on). Illogical time and date entries
result in undefined operation. Bit 7 of register 0 is the
enable oscillator (EOSC) bit. When this bit is set to 1,
the oscillator is disabled. When cleared to 0, the oscil-
lator is enabled. The initial power-up value of EOSC is
0. The clock can be halted whenever the timekeeping
functions are not required, minimizing V
(I
Location 02h is the century/hours register. Bit 7 and bit
6 of the century/hours register are the century-enable
bit (CEB) and the century bit (CB). Setting CEB to logic
1 causes the CB bit to toggle, either from a logic 0 to a
logic 1, or from a logic 1 to a logic 0, when the years
register rolls over from 99 to 00. If CEB is set to logic 0,
CB does not toggle.
When reading or writing the time and date registers,
secondary (user) buffers are used to prevent errors
when the internal registers update. When reading the
time and date registers, the user buffers are synchro-
nized to the internal registers on any START or STOP
and when the register pointer rolls over to zero. The
time information is read from these secondary registers
while the clock continues to run. This eliminates the
need to reread the registers in case the internal regis-
ters update during a read.
The divider chain is reset whenever the seconds regis-
ter is written. Write transfers occur on the acknowledge
from the DS1340. Once the divider chain is reset, to
Figure 6. Trickle Charger Functional Diagram
BACKUPDR
) when V
CC
V
TCS3
BIT 7
CC
is not applied.
NOTE: ONLY 1010b
ENABLES CHARGER
TCS2
BIT 6
1 OF 16 SELECT
TCS1
BIT 5
TCS0
BIT 4
_____________________________________________________________________
BIT 3
DS1
BAT
SELECT
1 OF 2
I
2
BIT 2
current
DS0
C RTC with Trickle Charger
ROUT1
BIT 1
SELECT
1 OF 3
ROUT0
BIT 0
avoid rollover issues, the remaining time and date reg-
isters must be written within one second.
The DS1340 has three additional registers (control,
trickle charger, and flag) that control the RTC, trickle
charger, and oscillator flag output.
Bit 7: Output Control (OUT). This bit controls the out-
put level of the FT/OUT pin when the FT bit is set to 0. If
FT = 0, the logic level on the FT/OUT pin is 1 if OUT = 1
and 0 if OUT = 0. The initial power-up OUT value is 1.
Bit 6: Frequency Test (FT). When this bit is 1, the
FT/OUT pin toggles at a 512Hz rate. When FT is written
to 0, the OUT bit controls the state of the FT/OUT pin.
The initial power-up value of FT is 0.
Bit 5: Calibration Sign Bit (S). A logic 1 in this bit indi-
cates positive calibration for the RTC. A 0 indicates
negative calibration for the clock. See the Clock
Calibration section for a detailed description of the bit
operation. The initial power-up value of S is 0.
Bits 4 to 0: Calibration Bits (CAL4 to CAL0). These
bits can be set to any value between 0 and 31 in binary
form. See the Clock Calibration section for a detailed
description of the bit operation. The initial power-up
value of CAL0–CAL4 is 0.
The simplified schematic in Figure 6 shows the basic
components of the trickle charger. The trickle-charge
select (TCS) bits (bits 4–7) control the selection of the
trickle charger. To prevent accidental enabling, only a
TCS
DS
TOUT
0-1
0-3
0-1
Special-Purpose Registers
= DIODE SELECT
= TRICKLE-CHARGER SELECT
= RESISTOR SELECT
Trickle-Charger Register (08h)
250Ω
2kΩ
4kΩ
R1
R2
R3
Control Register (07h)
V
BACKUP
9