DS12885Q+ Maxim Integrated Products, DS12885Q+ Datasheet - Page 13

• Manufacturer Part Number: DS12885Q+
• Description: IC RTC W/RAM 128 BYTE 28-PLCC
• Manufacturer: Maxim Integrated Products
• Type: Clock/Calendar/NVSRAMr

Specifications of DS12885Q+

• Memory Size: 114B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-LCC, 28-PLCC
• Function: Clock/Calendar/Alarm
• Rtc Memory Size: 114 Byte
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Multiplexed
• Supply Current: 15 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The three alarm bytes can be used in two ways. First,
when the alarm time is written in the appropriate hours,
minutes, and seconds alarm locations, the alarm inter-
rupt is initiated at the specified time each day, if the
alarm-enable bit is high. In this mode, the “0” bits in the
alarm registers and the corresponding time registers
must always be written to 0 (Table 2A and 2B). Writing
the 0 bits in the alarm and/or time registers to 1 can
result in undefined operation.
The second use condition is to insert a “don’t care”
state in one or more of the three alarm bytes. The don’t-
care code is any hexadecimal value from C0 to FF. The
two most significant bits of each byte set the don’t-care
Table 2A. Time, Calendar, and Alarm Data Modes—BCD Mode (DM = 0)
X = Read/Write Bit.
* DS12C887, DS12C887A only. General-purpose RAM on DS12885, DS12887, and DS12887A.
Note: Unless otherwise specified, the state of the registers is not defined when power is first applied. Except for the seconds regis-
ter, 0 bits in the time and date registers can be written to 1, but may be modified when the clock updates. 0 bits should always be
written to 0 except for alarm mask bits.
ADDRESS
0EH-31H
33H-7FH
0AH
0BH
0CH
0DH
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
32H
AM/PM
AM/PM
BIT 7
IRQF
SET
VRT
UIP
X
X
0
0
0
0
0
0
0
0
0
BIT 6
DV2
PIE
PF
0
0
0
0
0
0
X
X
10 Century
10 Years
10 Seconds
10 Seconds
10 Minutes
10 Minutes
BIT 5
DV1
AIE
AF
0
0
0
0
0
X
X
10 Hours
10 Hours
10 Date
10 Months
10 Hours
10 Hours
____________________________________________________________________
BIT 4
DV0
UIE
UF
0
0
X
X
SQWE
BIT 3
RS3
0
X
X
0
0
BIT 2
RS2
DM
Seconds
Seconds
0
0
X
X
condition when at logic 1. An alarm is generated each
hour when the don’t-care bits are set in the hours byte.
Similarly, an alarm is generated every minute with
don’t-care codes in the hours and minute alarm bytes.
The don’t-care codes in all three alarm bytes create an
interrupt every second.
All 128 bytes can be directly written or read, except for
the following:
1) Registers C and D are read-only.
2) Bit 7 of register A is read-only.
3) The MSB of the seconds byte is read-only.
Minutes
Minutes
Century
Month
Hours
Hours
Date
Year
24/12
BIT 1
RS1
Day
0
0
X
X
Real-Time Clocks
BIT 0
DSE
RS0
X
X
0
0
Seconds Alarm
Minutes Alarm
Hours Alarm
FUNCTION
Seconds
Century*
Minutes
Control
Control
Control
Control
Month
Hours
Date
Year
RAM
RAM
Day
1–12 +AM/PM
1–12 +AM/PM
RANGE
00–59
00–59
00–59
00–59
00–23
00–23
01–07
01–31
01–12
00–99
00–99
—
—
—
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—
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