DS1558W+ Maxim Integrated Products, DS1558W+ Datasheet - Page 9

• Manufacturer Part Number: DS1558W+
• Description: IC RTC W/NV RAM 3.3V 48-LQFP
• Manufacturer: Maxim Integrated Products
• Type: Watchdog Timer/NVSRAMr

Specifications of DS1558W+

• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -

Table 3. ALARM MASK BITS
W
a
register (address 7FFF0h). W
stable for as short as 15ns and either
fulfilled (F
i
c
read/write cycle and the
The
occurs and both
but an alarm genera
to determ
during the backup-ba
Figure 2. CLEARING IRQ WAVEFORMS ACTIVE
Figure 3. CLEARING IRQ WAVEFORMS
mmedi
larm c
leared
hen t
AM4
1
1
1
1
0
IRQ
he R C regis
ond
ate
by
/FT pin can also be activated in
ine if an alarm was generated d
ly, b
igure 2). Once the addr
ition
a re
T
AM3
ut is
ad or
1
1
1
0
0
ac i
ABE and AE are set. Th
t vates the
ted during power-up se
not guarant
ter values m
ttery mode and power-up states.
write to th
IRQ
AM2
1
1
0
0
0
/FT igna as b
hen
IRQ
eed to be c
e flags reg
s
atch alarm
ess has been s
/FT pin. The
CE
AM1
l h
OE
1
0
0
0
0
is active, t e
e ABE and AE bits are cleared during t
uring the power-up
or
ts AF. Therefore, the AF bit
ister, but
the battery-bac
leared un
register setting
een ear .
WE
Once per second
Whe
When
When
When date, hours, m
elected for at least 15ns, the
cl
IRQ
h
9 of 18
active, ut is
n s ond
hours, minutes, and seconds match
minutes and
/FT signal
IRQ
til t
the flag
ec
ed
RC
/FT si
b
ked mode. The
s, AF
s ma
is
does not chang state
sequence. Figure 4 illustrates alarm timing
fulfilled (Figu
gnal can be
not guaran
is cleared
tch
second
is set to
inute
ALARM RATE
can be read after system power-up
s, and s
s match
a 1. If AE is also set to a 1, the
teed
by a
clear
IRQ
IRQ
re
e
econd
/FT goes low if an alarm
to b
3). T
read
ed
/FT sign
he power-up transition,
by having the address
e cleared unless t
s until the end of the
he alarm flag is also
s match
or write to the flags
al can be cleared
RC
is