DS1315-5 Maxim Integrated Products, DS1315-5 Datasheet
DS1315-5
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DS1315-5 Summary of contents
Page 1
... The watch operates in one of two formats: a 12-hour mode with an AM/PM indicator or a 24-hour mode. The nonvolatile controller supplies all the necessary support circuitry to convert a CMOS RAM to a nonvolatile memory. The DS1315 can be interfaced with either RAM or ROM without leaving gaps in memory. PIN CONFIGURATIONS 1 ...
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... ORDERING INFORMATION PART TEMP RANGE DS1315-33 0°C to +70°C DS1315N-33 -40°C to +85°C DS1315N-33+ -40°C to +85°C DS1315-5 0°C to +70°C DS1315N-5 -40°C to +85°C DS1315N-5+ -40°C to +85°C DS1315E-33 0°C to +70°C DS1315E-33+ 0°C to +70°C DS1315EN-33 -40°C to +85°C DS1315EN-33+ -40° ...
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... Figure 1. Block Diagram DS1315 Phantom Time Chip ...
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... Time Chip. A standard 32.768 kHz quartz crystal can be directly connected to the DS1315 via pins 1 and 2 (X1, X2). The crystal selected for use should have a specified load capacitance (C on crystal selection and crystal layout considerations, please consult Application Note 58, “Crystal Considerations with Dallas Real Time Clocks.” ...
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... Figure 2. Time Chip Comparison Register Definition Note: The pattern recognition in Hex is C5, 3A, A3, 5C, C5, 3A, A3, 5C. The odds of this pattern being accidentally duplicated and causing inadvertent entry to the Phantom Time Chip are less than DS1315 Phantom Time Chip ...
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... SRAM. The DS1315 also performs redundant battery control for high reliability. On power-fail, the battery with the highest voltage is automatically switched to V system, the unused battery input should be connected to ground. The DS1315 safeguards the Time Chip and RAM data by power-fail detection and write protection. Power-fail detection occurs when V DS1315 constantly monitors the V ...
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... Time Chip to abort data transfer without changing data in the timekeeping registers. Reset operates independently of all other in-puts. Bit 5 controls the oscillator. When set to logic 0, the oscillator turns on and the real time clock/calendar begins to increment. DS1315 Phantom Time Chip ...
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... Zero Bits Registers and 6 contain 1 or more bits that will always read logic 0. When writing these locations, either a logic acceptable. Figure 5. Time Chip Register Definition DS1315 Phantom Time Chip ...
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... SYMBOL MIN TYP I CC1 I CC01 I CC2 I CC3 2 4. BAT1 BAT2 DS1315 Phantom Time Chip -0.3V to +7.0V 0°C to +70°C -45°C to +85°C -55°C to +125°C See IPC/JEDEC J-STD-020 MAX UNITS NOTES 5 +0.6 V 3.7 V MAX UNITS NOTES 6 mA 150 1 µA +1 µ ...
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... CEI Pulse Width OE Pulse Width RST SYMBOL MIN TYP V - 0.2 CCI or V CEO V - BAT1,2 0.2 I BAT I CCO2 SYMBOL MIN TYP COE t 5 OEE ODO RST DS1315 Phantom Time Chip MAX UNITS NOTES V 8 0.5 µ µ GND RAM MAX UNITS NOTES ...
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... OUT Power-Fail Trip Point Battery Switch Voltage SYMBOL MIN TYP COE t 5 OEE ODO RST SYMBOL MIN TYP I CC1 I CC01 I CC2 I CC3 2 2 BAT1 BAT2 DS1315 Phantom Time Chip = V RAM CCO MAX UNITS NOTES MAX UNITS NOTES 100 1 µA +1 µ 0 2. ...
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... V CEO V BAT1,2 - 0.2 I BAT I CCO2 SYMBOL MIN TYP t 120 COE t 5 OEE ODO 120 WC t 100 100 CW t 100 OW t 120 RST DS1315 Phantom Time Chip MAX UNITS NOTES V 8 0.5 µ µ GND RAM MAX UNITS NOTES ns 100 ns 100 ...
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... CAPACITANCE (T = +25°C) A PARAMETER Input Capacitance Output Capacitance SYMBOL MIN TYP t 120 COE t 5 OEE ODO 120 WC t 100 CW t 100 120 RST SYMBOL MIN TYP OUT DS1315 Phantom Time Chip = V RAM CCO MAX UNITS NOTES ns 100 ns 100 MAX UNITS NOTES ...
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... Figure 6. Timing Diagram: Read Cycle to Time Chip ROM/ RAM = GND Figure 7. Timing Diagram: Write Cycle to Time Chip ROM/ RAM = GND DS1315 Phantom Time Chip ...
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... Figure 8. Timing Diagram: Read Cycle to Time Chip ROM/ RAM = V Figure 9. Timing Diagram: Write Cycle to Time Chip ROM/RAM = V CCO CCO DS1315 Phantom Time Chip ...
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... Slew Rate CC Power-Down V (max (min Slew Rate CC Power-Down V (min Slew Rate CC Power-Up V (min (max High to Power-Fail CEI Propagation Delay CEI Figure 11. 5V Power-Up Condition t RST SYMBOL MIN TYP t 1.5 REC t 300 DS1315 Phantom Time Chip MAX UNITS NOTES 2 µs 11 µs 11 µ µ ...
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... CCO (T = 0°C to +70°C) A PARAMETER Recovery Time at Power-Up V Slew Rate CC Power-Down V (max (min Slew Rate CC Power-Up V (min (max High to Power-Fail CEI Propagation Delay CEI SYMBOL MIN TYP t 1.5 REC t 300 DS1315 Phantom Time Chip MAX UNITS NOTES 2 µs 12 µs 12 µ ...
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... CCO1 8) Applies to with the ROM/ CEO will low level as V CEO the maximum average load current that the DS1315 can supply to memory in the battery CCO2 backup mode. 10) Applies to all input pins except 11) See Figures 11 and 12. 12) See Figures 13 and 14. 13 determined by the larger of V ...
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... Figure 14. 3.3V Power-Down Condition Figure 15. Output Load DS1315 Phantom Time Chip ...
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... PACKAGE CODE 16 PDIP P16+1 16 TSSOP U20 W16 CC1 CC0 WE 14 BAT2 NC 13 RST BAT1 12 OE GND 11 CEI NC 10 CEO D 9 ROM/RAM Q GND DOCUMENT NO. 21-0043 21-0066 21-0042 DS1315 Phantom Time Chip CC1 CC0 3 18 BAT2 RST CEI 9 12 CEO 11 ROM/RAM 10 20-Pin TSSOP ...
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... DIP PKG 16-PIN DIM. MIN A IN. 0.740 MM B IN. 0.240 MM C IN. 0.120 MM D IN. 0.300 MM E IN. 0.015 MM F IN. 0.110 MM G IN. 0.090 MM H IN. 0.300 MM J IN. 0.008 MM K IN. 0.015 DS1315 Phantom Time Chip MAX 0.780 0.260 0.140 0.325 0.040 0.140 0.110 0.370 0.012 0.021 ...
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... BSC MM 1.27 BSC H IN. 0.398 MM 10.11 J IN. 0.009 MM 0.229 K IN. 0.013 MM 0.33 L IN. 0.016 MM 0.40 PHI 0° DS1315 Phantom Time Chip MAX 0.412 10.46 0.300 7.65 0.095 2.41 0.012 0.30 0.105 2.68 0.416 10.57 0.013 0.33 0.019 0.48 0.040 1.02 8° ...
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... The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation. DIM phi © 2007 Maxim Integrated Products DS1315 Phantom Time Chip MIN MAX — 1.10 0.05 — 0.75 1.05 0.09 0.18 0.50 0.70 0.65 BSC 0.18 0.30 6 ...