MAX19713ETN+ Maxim Integrated Products, MAX19713ETN+ Datasheet - Page 3

• Manufacturer Part Number: MAX19713ETN+
• Description: IC ANLG FRONT END 45MSPS 56-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX19713ETN+

• Number Of Bits: 10
• Number Of Channels: 2
• Power (watts): 91.8mW
• Voltage - Supply, Analog: 3V
• Voltage - Supply, Digital: 3V
• Package / Case: 56-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ELECTRICAL CHARACTERISTICS (continued)
(V
= -0.5dBFS, Tx DAC output amplitude = 0dBFS, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx DAC output, C
C
V
OV
Rx ADC DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
DC Gain Matching
Offset Matching
Gain Temperature Coefficient
Power-Supply Rejection
Rx ADC ANALOG INPUT
Input Differential Range
Input Common-Mode Voltage
Range
Input Impedance
COM
DD
DD
DD
= 3V, OV
Supply Current
= 0.33µF, C
Supply Current
PARAMETER
DD
= 1.8V, internal reference (1.024V), C
L
< 5pF on all aux-DAC outputs, T
_______________________________________________________________________________________
SYMBOL
DNL
V
INL
V
R
C
CM
ID
IN
IN
A
= T
L
Idle mode: f
and at midscale, aux-ADC ON
Shutdown mode: CLK = 0 or OV
ADC OFF
FD m od e: f
b oth D AC channel s; f
AD C channel s; aux- D AC s O N and at
m i d scal e, aux- AD C O N
SPI1-Rx and SPI3-Rx modes: f
45MHz, f
channels; DAC input bus tri-stated; aux-
DACs ON and at midscale, aux-ADC ON
SPI2-Tx and SPI4-Tx modes: f
45MHz, f
channels; ADC output bus tri-stated; aux-
DACs ON and at midscale, aux-ADC ON
Standby mode: CLK = 0 or OV
DACs ON and at midscale, aux-ADC ON
Idle mode: f
and at midscale, aux-ADC ON
Shutdown mode: CLK = 0 or OV
ADC OFF
Residual DC offset error
Includes reference error
Offset (V
Gain (V
Differential or single-ended inputs
Switched capacitor load
≈ 10pF on all digital outputs, f
MIN
to T
10-Bit, 45Msps, Full-Duplex
DD
DD
IN
OUT
MAX
C LK
±5%)
= 5.5MHz on both ADC
CLK
CLK
±5%)
, unless otherwise noted. Typical values are at T
= 2.2MHz on both DAC
CONDITIONS
= 45M H z, f
= 45MHz; aux-DACs ON
= 45MHz; aux-DACs ON
I N
= 5.5M H z on b oth
OU T
CLK
CLK
= 2.2M H z on
CLK
DD
DD
DD,
= 45MHz (50% duty cycle), Rx ADC input amplitude
; aux-
Analog Front-End
=
=
, aux-
aux-
-0.15
MIN
10
-5
-5
±0.512
V
±1.25
±0.65
±0.04
±0.07
±0.2
±0.7
±0.2
DD
TYP
12.4
4.35
±10
±30
310
120
0.5
4.6
0.1
0.1
73
5
A
/ 2
= +25°C.) (Note 1)
+0.15
MAX
+5
+5
15
REFP
5
= C
ppm/°C
UNITS
%FS
%FS
REFN
LSB
LSB
LSB
LSB
Bits
mA
mA
µA
µA
dB
k Ω
pF
V
V
3
=