MAXQ3183-RAN+ Maxim Integrated Products, MAXQ3183-RAN+ Datasheet
MAXQ3183-RAN+
Specifications of MAXQ3183-RAN+
Related parts for MAXQ3183-RAN+
MAXQ3183-RAN+ Summary of contents
Page 1
... Bidirectional Reset Input/Output ♦ SPI-Compatible Serial Interface with Interrupt Request (IRQ) Output ♦ Single 3.3V Supply, Low Power (35mW typical) PART MAXQ3183-RAN+ + Denotes a lead(Pb)-free/RoHS-compliant package. Pin Configuration and Typical Application Circuit appear at end of data sheet. Ordering Information TEMP RANGE PIN-PACKAGE -40° ...
Page 2
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 3
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect TABLE OF CONTENTS (continued) Global Interrupt Registers . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 4
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect TABLE OF CONTENTS (continued) Virtual Register Conversion Coefficients . . . . . . . . . . . . . . . . . . . . . . . ...
Page 5
... Overvoltage and Overcurrent Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62 Meter Units to Real Units Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62 Units Conversion Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64 Calibration Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64 Calibration Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64 Calibrating Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65 Calibrating Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65 Calibrating Phase Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66 Interfacing the MAXQ3183 to External Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 Connections to the Power Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 Sensor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 Voltage Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 Voltage-Divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 Voltage Transformer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68 Current Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68 Current Shunt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68 Current Transformer ...
Page 6
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect TABLE OF CONTENTS (continued) Calibrating Power/Energy Gain . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 7
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect TABLE OF CONTENTS (continued) Miscellaneous Gain . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 8
... RMS Current, Harmonic/Neutral (I.N, I.HARM) (0x840 .100 Ratio of Harmonic/Fundamental (HARM_NF) (0x850 .100 Special Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Grounds and Bypassing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Specific Design Considerations for MAXQ3183-Based Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Additional Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Typical Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102 ...
Page 9
... Figure 4a. SPI Interface Timing (CKPHA = .20 Figure 4b. SPI Interface Timing (CKPHA = .20 Figure 5. Read SPI Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Figure 6. Write SPI Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Figure 7. Flowchart for Reading from MAXQ3183 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Figure 8. Flowchart for Writing to MAXQ3183 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Figure 9. Per Sample Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 Figure 10. Computation of RMS Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 Figure 11. Phase Compensation for Energy Calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 Figure 12 ...
Page 10
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect ABSOLUTE MAXIMUM RATINGS Voltage Range on DVDD Relative to DGND .........-0.3V to +4.0V Voltage Range on AVDD Relative to AGND..........-0.3V to +4.0V Voltage Range on AGND Relative to DGND .........-0.3V to ...
Page 11
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect ELECTRICAL CHARACTERISTICS (continued 3.6V -40°C to +85°C, unless otherwise noted.) (Note 2) AVDD DVDD RST A PARAMETER SYMBOL Input Low Current RESET Pullup ...
Page 12
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect ELECTRICAL CHARACTERISTICS (continued 3.6V -40°C to +85°C, unless otherwise noted.) (Note 2) AVDD DVDD RST A PARAMETER SYMBOL SSEL Low to First SCLK ...
Page 13
... HW MULTIPLY 48-BIT ACCUMULATE ______________________________________________________________________________________ REF ADC ADC CONTROL, ELECTRICITY METERING DSP, COMMUNICATIONS MANAGER WATCHDOG TIMER POR/ BROWNOUT SYSCLK MONITOR ADCCLK MAXQ3183 Block Diagram CFP, CFQ COUNTERS I/O BUFFERS I/O REGISTERS SPI I/O BUFFERS I/O REGISTERS I/O I/O REGISTERS BUFFERS HF RC OSC/8 ...
Page 14
... Master Out-Slave In Input. This line is used by the master to transmit data to the slave (the 15 MOSI MAXQ3183) over the SPI interface. Master In-Slave Out Output. This line is used by the MAXQ3183 (the slave) to transmit data back to 16 MISO the master over the SPI interface. ...
Page 15
... Precision Pulse Generators The MAXQ3183 includes two precision pulse genera- tors that generate a pulse whenever certain conditions are met. In the MAXQ3183, many meter quantities can be selected for conversion to meter pulses including absolute energy, net energy, reactive energy, voltage, and current. ...
Page 16
... INTERNAL RESET Figure 1. External Reset 16 ______________________________________________________________________________________ MAXQ3183, the SSEL line is normally driven low at the beginning of each SPI command. This means that if the master sends an SPI command after the MAXQ3183 enters Stop Mode, the MAXQ3183 automatically exits Stop Mode. There are several different sources that can cause the MAXQ3183 to undergo a reset cycle ...
Page 17
... Under normal circumstances, the MAXQ3183 always resets the watchdog timer often Power-On Reset enough to prevent it from expiring. However internal error of some kind causes the MAXQ3183 to lock up or power-fail RST enter an endless execution loop, the watchdog timer expires and triggers an automatic hardware reset. There ...
Page 18
... PWRF has been set hardware, it can only be cleared by the master ( system reset). Whenever PWRF = 1, if the EPWRF interrupt masking bit is also set to 1, the MAXQ3183 drives IRQ low to signal to the master that an interrupt condition (in this case, a power- fail warning) exists and requires attention. ...
Page 19
... SPI bus interface, is also used for master/slave communications because it allows the MAXQ3183 to notify the master that an interrupt condi- tion exists. Some SPI peripherals sacrifice speed in favor of simulating a half-duplex operation. This is not the case with the MAXQ3183 truly a full-duplex SPI slave. 19 ...
Page 20
... Transfers over the SPI interface always start with the most significant bit and end with the least significant bit. All SPI data transfers to and from the MAXQ3183 are always 8 bits (one byte) in length. The MAXQ3183 SPI interface does not support 16-bit character lengths. ...
Page 21
... MAXQ3183’s clock frequency divided by 4. For example, when the MAXQ3183 is run- ning at 8MHz, the SPI clock frequency must be 2MHz or less. And if the MAXQ3183 is running in LOWPM Mode (or if the crystal is still warming up), the SPI clock frequency must remain at 250kHz or less for proper communications operation ...
Page 22
... For this reason, the MAXQ3183 always sends zero or more bytes of a NAK character (0x4E or ASCII ‘N’) followed by an ACK char- acter (0x41, or ASCII ‘A’) before sending the data. ...
Page 23
... If the master mistakenly sends more bytes than are required by the current command, the extra bytes are either ignored (if the MAXQ3183 is busy processing the previous command) or are inter- preted as the beginning of a new command. If the mas- ...
Page 24
... This byte spacing must be no less than 400 system clocks to ensure that the MAXQ3183 has a chance to read and process the byte before the arrival of the next one strongly rec- ommended that CRC be enabled for both read and write to achieve reliable operations ...
Page 25
... They are calculated at the time they are requested, and thus can involve addi- ______________________________________________________________________________________ DONE? EXIT Figure 8. Flowchart for Writing to MAXQ3183 tional time to return a value. Most virtual registers are 8 bytes in length and are delivered least significant byte first. WRITE MAXQ3183 ...
Page 26
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Table 3. RAM Register Map x0h x1h x2h x3h 0x00 STATUS MODE0 MODE1 MODE2 0x01 AUX_CFG SYS_KHZ 0x02 PLS1_WD THR1 0x03 AVG_C HPF_C 0x04 NS R_ 0x05 R_ADCACQ ...
Page 27
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Table 4. Virtual Register Map x0 x1 0x80 PWRP.A PWRP.B 0x81 PWRQ.A PWRQ.B 0x82 PWRS.A PWRS.B 0x83 V.HARM V.A 0x84 I.N, I.HARM I.A 0x85 HARM_NF 0x86 0x87 ENRS.A ENRS.B 0x88 PWRPF.A ...
Page 28
... BIT NAME 7 — Reserved. When set, the high-frequency crystal has failed and the MAXQ3183 is operating from its internal ring 6 CROFF oscillator. Under these circumstances, energy accumulation is not accurate and the SPI bus does not operate at full speed. When set, the last reset was due to power-on-reset. Host should clear this bit to allow the next POR ...
Page 29
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: — — Reset BIT NAME 7:5, 0 — Reserved. When set, the high-frequency crystal oscillator is disabled and the XTAL1 pin is configured to be ...
Page 30
... Setting this bit disables all fundamental frequency registers 4 DFUN but allows the MAXQ3183 to calculate other parameters at a higher rate. Set this bit when (1) fundamental mode values do not need to be read, and (2) R_ADCRATE needs to be reduced below its default value. ...
Page 31
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect BIT NAME 3P4W Wiring (00) 3V3A (10) 2:1 WIRSYS 1P3W (00) Selects the mechanism to use for calculating apparent power APPSEL RMS RMS 2 ...
Page 32
... When set, the direction of real energy flow has changed (that is, from toward the load to away from the 12 DCHA load, or from away from the load to toward the load). When set, the MAXQ3183 has failed to detect zero crossings on one or more voltage channels in one 11 NOZX complete DSP cycle. ...
Page 33
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: EDSPOR EDSPRDY Reset Bit Name: — — Reset BIT NAME When set, the DSPOR flag causes the IRQ pin to become ...
Page 34
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: This register selects which phases are included in the CFP pulse output and also selects which quantity is accumu- lated to drive the pulse output. BIT ...
Page 35
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: This register selects which phases are included in the CFQ pulse output and also selects which quantity is accumu- lated to drive the pulse output. BIT ...
Page 36
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: Bit Name: Reset: Bit Name: Reset: This register designates the threshold of the CFP pulse. This value ...
Page 37
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: Bit Name: Reset: Bit Name: Reset: This register designates the threshold of the CFQ pulse. This value ...
Page 38
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Voltage Gain, Phase X = A/B/C (X.V_GAIN) (A: 0x132, B: 0x21E, C: 0x30A) Bit Name: Reset: Bit Name: Reset: This register contains gain coefficient for phase X ...
Page 39
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Phase-Angle Compensation, Medium Range, Phase X = A/B/C (X.PA1) Bit Name: Reset: Bit Name: Reset: This signed register contains the angle fraction of one radian, ...
Page 40
... Name: Reset: This register specifies the fraction of full-scale current below which a no-load condition is declared. When X.IRMS falls below this level, the MAXQ3183 no longer accumulates power for phase X. Full scale is represented by 0x10000. The maximum value for this register is 0xFFFF. 40 ______________________________________________________________________________________ Overvoltage Level (OVLVL) (0x046) ...
Page 41
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: This register specifies the threshold value for the vector sum (of three phase currents or three phase currents plus the neutral ...
Page 42
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Interrupt Mask, Phase X = A/B/C (X.MASK) (A: 0x145, B: 0x231, C: 0x31D) Bit Name: DIR_R DIR_A Reset BIT NAME Reactive Energy Direction Status 7 DIR_R 0 ...
Page 43
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: Line frequency, LSB = 0.001Hz. Power Factor, Phase X = A/B/C (X.PF) (A: 0x1C6, B: 0x2B2, C: 0x39E) Bit ...
Page 44
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect RMS Current, Phase X = A/B/C (X.IRMS) (A: 0x1CC, B: 0x2B8, C: 0x3A4) Bit Name: Bit Name: Bit Name: Bit Name: This register ...
Page 45
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Bit Name: Bit Name: Bit Name: On every DSP cycle, the contents of the X.ACT register are tested, and, if negative, ...
Page 46
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Bit Name: Bit Name: Bit Name: On every DSP cycle, the contents of the X.REA register are tested, and, if negative, ...
Page 47
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: This register contains the value by which the raw voltage value in each phase (A.VRMS, B.VRMS, and C.VRMS) is multiplied before ...
Page 48
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: This register contains the value by which the raw power value in each phase is multiplied before being presented to the ...
Page 49
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: This register contains the value by which the raw accumulated energy value in each phase is multiplied before being presented to ...
Page 50
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Energy Units Conversion Coefficient (ENR_CC) (0x01A) (continued) DESCRIPTION Reactive energy, phase C, positive direction, fundamental only Reactive energy, phase C, reverse direction, fundamental only Reactive energy, total, fundamental only Apparent energy, ...
Page 51
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect The virtual registers are calculated values derived from one or more real registers. They are calculated at the time they are requested, and thus could involve additional time to return a ...
Page 52
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Apparent Power, Phase X = A/B/C/T (PWRS.X) (A: 0x821, B: 0x822, C: 0x824, T: 0x827) This register contains the apparent instantaneous power delivered into phase A/B/C or total. Power is calculated ...
Page 53
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect This signed register contains the power factor of the total power. The power factor is calculated as expressed in units of 0.00001; thus, unity power factor is expressed as ...
Page 54
... C CLK Using the default register settings (R_ADCRATE = 167h = 359d), the time for each analog slot measurement ( 45μs when the MAXQ3183 is running at 8MHz. C Since there are eight analog scan slots in the measure- ment frame, the total time for all measurements ( Using the default settings with the MAXQ3183 ...
Page 55
... NS (and every other value in the meter, since they depend on NS) would have a significant amount of uncertainty. A better method is to use each newly cal- culated value input to a filter. The output of the filter is then the value of NS that is actually used in calculations. In the MAXQ3183, this filter is controlled by the AVG_NS register I_GAIN ...
Page 56
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect A second problem with updating NS on every line cycles is the fact that noise impulses that occur at near- ly the same time as the zero crossing can shift the ...
Page 57
... Consequently, for the most precise mea- surements, the phase between the voltage and current signals must be compensated. In the MAXQ3183, the energy signals are compensated for phase offset by performing a complex multiplication of the signal with the contents of the appropriate phase offset register ...
Page 58
... The MAXQ3183 monitors the voltage signal on each phase for zero-crossing events ascending zero crossings are detected within a DSP cycle, the NOZXF (X.FLAGS) flag is set by the MAXQ3183 to notify the master of this condition. If the NOZXM bit is set, this flag sets the NOZX bit in the IRQ_FLAG. If the interrupt enable bit ENOZX is set to 1, the interrupt signal IRQ is driven low by the MAXQ3183 whenever NOZX = 1 ...
Page 59
... Full scale is represented by 0x10000. ______________________________________________________________________________________ So far in this discussion, the values being calculated and managed in the MAXQ3183 have been based on fundamental units meaningful to the device itself: volt- age as a binary fraction of full-scale voltage; current as a binary fraction of full-scale current, and time as a non- integer multiple of the ADC frame time ...
Page 60
... The MAXQ3183 measures energy. But power is just energy per unit time, and the MAXQ3183 keeps track of the time unit over which energy is accumulated. This is simply the NS value, the fractional number of samples that comprises one DSP cycle. So converting energy to power is as simple as dividing the accumulated energy over one DSP cycle by NS ...
Page 61
... PHASEA, PHASEB, and PHASEC bits in the PLSCFG1 or PLSCFG2 registers to include them in the accumulation. Generating Pulses On every DSP cycle, the MAXQ3183 adds the value in the selected register (or set of registers) to the pulse accumulator. If the value in the pulse accumulator exceeds the value in the associated threshold register ...
Page 62
... OCLVL register. Both OVLVL and OCLVL registers represent the bits 23:8 of the VRMS or IRMS registers. Any time the MAXQ3183 detects the RMS-value exceeding a thresh- old level, the interrupt flag is set. If enabled, any of these flags issues an interrupt request. All inter- rupt flags are “ ...
Page 63
... Meter units are defined with respect to the base para- TR meters as shown in Table 5. is design TR When reading virtual registers, the MAXQ3183 uses the configurable conversion coefficients AMP_CC, VOLT_CC, PWR_CC, and ENR_CC to return meaningful data. Table 6 describes how to set the coefficients. and ADC full-scale ...
Page 64
... I Use the default ADC timing t = 360μs, we get the fol- FR lowing meter unit to physical unit conversion coeffi- cients (these coefficients are not part of the MAXQ3183 registers): 24 MU_AMP = 6.1E-6 (A) FS ...
Page 65
... FS • Divide the applied value (in meter unit) by the value read from the MAXQ3183. The result should be a value between 0 and 2. If the value falls outside of this range, you have probably miscalculated V • Multiply the calculated value by 2 gain value to be programmed into A.V_GAIN. Ensure the most significant bit is 0 ...
Page 66
... Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect • Divide the applied value (in meter unit) by the value read from the MAXQ3183. The result should be a value between 0 and 2. If the value falls outside of this range, you have probably miscalculated I • Multiply the calculated value by 2 gain value to be programmed into A ...
Page 67
... The MAXQ3183 supports all of these connection arrangements. Sensor Selection The MAXQ3183 supports a variety of voltage and cur- rent sense elements. This section describes the proper- ties of many of these sensing devices. A voltage-divider is an ideal voltage-sensing element when there is no need for voltage isolation ...
Page 68
... There are several other registers that directly affect the AFE function. These registers directly affect the hard- ware functionality, and should be modified only when it is explicitly required. For example, if the MAXQ3183 is operated at some frequency other than the nominal 8MHz system clock, modification of these registers by supervisory code becomes necessary to maintain a 360μ ...
Page 69
... LPF using following formula: ZC LPF The MSB of this register must be zero. For each phase A, B, and C, the MAXQ3183 counts the number of scan frames (NS) between zero crossings within a DSP cycle. Each individual phase zero-crossing event contributes the raw NS count that plugs as input to lowpass filter (AVG_NS/65,536 ...
Page 70
... The MAXQ3183 has an additional control bit AUX_CFG.INREV to reverse the sign of IN current. When the bit is set (AUX_CFG = 0x006F), the MAXQ3183 cal- culates the value ( IN) instead of ( IN). Doing so allows vector sum computation in case of reverse connection of neutral current sensor. ...
Page 71
... FS Temperature be controlled with arbitrary precision, and because high gain implies increased noise, it may be necessary to calibrate the MAXQ3183 to maintain linearity at the lowest inputs. There are two settings that manage low-current lineari- ty: an offset setting, OFFS_LO; and a gain setting, GAIN_LO. Setting the offset is simple. Ensure no cur- rent is flowing in the current circuit ...
Page 72
... Convert the applied value to meter units by dividing it by MU_PWR. • Divide the applied value (in meter unit) by the value read from the MAXQ3183. The result should be a value between 0 and 2. If the value falls outside of this range, I calculated. • Multiply the calculated value by 2 MSB is zero ...
Page 73
... These registers configure the time slot normally assigned to current channels A/B/C. We recommend leaving these registers at their default values. If they must be reassigned, one must ensure that all the current and voltage chan- nels are reassigned properly so that the MAXQ3183 computes the power/energy parameters as intended by your setup. ...
Page 74
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset A: Reset B: Reset C: These registers configure the time slot normally assigned to voltage channels A/B/C. The user may wish to change the PGG settings ...
Page 75
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Time Slot Assignment—Neutral Current Channel (SCAN_IN) (0x00E) Bit Name: Reset: This register configures the time slot normally assigned to the neutral current channel. The user can change the DADCNV ...
Page 76
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Time Slot Assignment—Temperature Channel (SCAN_TE) (0x00F) Bit Name: Reset: This register configures the time slot normally assigned to the temperature measurement device. This register is managed by the firmware ...
Page 77
... Name: ENHARM ENAUX Reset The MAXQ3183 can monitor the RMS value of one auxiliary channel in addition to its normal processing. The Auxiliary Channel Configuration register selects which input the auxiliary channel processes and what processing is applied to the auxiliary channel. BIT NAME 15:13, 4 — ...
Page 78
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: This register contains the system clock frequency in kHz units. Because the default frequency is 8MHz, this register defaults to 0x1F40. ...
Page 79
... The NS register defines the fundamental timing for the electricity meter. It defines a DSP cycle in terms the period of the ADC scan frame. Generally, this register is calculated and updated automatically by the MAXQ3183 firmware based on the zero-crossing detection, and whether noise rejection (REJ_NS) and averaging (AVG_NS) are enabled. ...
Page 80
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: This register determines whether the NS value is averaged over previous values or whether the most recently measured value is used ...
Page 81
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: This register specifies the b coefficient of a first-order Butterworth filter using the following formula: 0 The MSB of this register ...
Page 82
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: Bit Name: Reset: Bit Name: Reset: This register specifies the a (feedback) coefficient for the fundamental-mode filter ...
Page 83
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Bit Name: Reset: Bit Name: Reset: Bit Name: Reset: Bit Name: Reset: This register specifies the a (feedback) coefficient for the harmonic mode ...
Page 84
... ADCASD ADCRY Reset This register is a mirror of a CPU register in the MAXQ3183. This register should not be modified by supervisory code. BIT NAME Disable ADC Automatic Shutdown. Normally, the ADC analog section is powered off following a conversion to conserve power. If this bit is set, the ADC leaves the analog section powered on ...
Page 85
... Name: ESPII SAS Reset This register is a mirror of a CPU register in the MAXQ3183. This register configures the SPI port of the MAXQ3183. BIT NAME 7 ESPII Enable SPI Interrupt. If set, arrival of a character on the SPI bus causes a CPU interrupt. SPI Slave Select Polarity. If clear, SSEL is assumed to be active low; if set, SSEL is assumed to be ...
Page 86
... Name: Reset: This register specifies the time in DSP cycles that the MAXQ3183 waits before accumulating energy. If this register is nonzero decremented on each DSP cycle. If the result of the decrement is nonzero, the results of the DSP cycle are discarded and are not accumulated to the energy registers. This register is useful for delaying the initiation of energy accumulation on startup or after some hardware function has been modified ...
Page 87
... Reset: Bit Name: Reset: This register specifies the fraction of full-scale current that causes the MAXQ3183 to switch from PA1 to PA2 to pro- vide phase-angle compensation. For more information, see the PA0, PA1, and PA2 register descriptions. The full- scale current is represented by 0x10000. Bit ...
Page 88
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Gain, Fundamental Energy, Phase X = A/B/C (X.EF_GAIN) (A: 0x136, B: 0x222, C: 0x30E) Bit Name: Reset: Bit Name: Reset: This register contains gain coefficient for phase ...
Page 89
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Linearity Offset, Low Range, Phase X = A/B/C (X.OFFS_LO) (A: 0x13C, B: 0x228, C: 0x314) Bit Name: Reset: Bit Name: Reset: This signed register contains the linearity ...
Page 90
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Fundamental Energy Overflow Flags, Phase X = A/B/C (X.EFOVER) Bit Name: — — Reset These bits indicate an overflow condition has occurred on a fundamental frequency energy ...
Page 91
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Energy, Fundamental, Real Negative, Phase X = A/B/C (X.EAFNEG) Bit Name: Bit Name: Bit Name: Bit Name: On every DSP cycle, the contents ...
Page 92
... On every DSP cycle, the contents of the X.ESF register are added to this register. When this register overflows, the SFOV bit in the X.EFOVER register is set. When the MAXQ3183 is operating in low-power mode, energy is not accu- mulated. However, during low-power mode, current values are accumulated to this register, making this register accumulate ampere-hours ...
Page 93
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Real Energy, Phase X = A/B/C (X.ACT) (A: 0x1D0, B: 0x2BC, C: 0x3A8) Bit Name: Bit Name: Bit Name: Bit Name: This signed ...
Page 94
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Apparent Energy, Phase X = A/B/C (X.APP) (A: 0x1D8, B: 0x2C4, C: 0x3B0) Bit Name: Bit Name: Bit Name: Bit Name: This signed ...
Page 95
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect Fundamental Reactive Energy, Phase X = A/B/C (X.REAF) (A: 0x1E0, B: 0x2CC, C: 0x3B8) Bit Name: Bit Name: Bit Name: Bit Name: This ...
Page 96
... This register contains the calculated 16-bit arithmetic checksum over critical configuration and calibration registers updated on every DSP cycle. In use, the administrative processor records the value in the CHKSUM register and then checks it periodically to verify that no configuration or calibration registers have changed. The MAXQ3183 sets the CHSCH bit when this register’s value changes. ...
Page 97
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect This signed register contains the real instantaneous power delivered into phase A/B/C or total at the fundamental line frequency only. Power is calculated from the instantaneous energy measurement according to the ...
Page 98
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect This register contains the instantaneous apparent power delivered into phase A/B/C or total at the fundamental line frequency only. Power is calculated from the instantaneous energy measurement according to the following ...
Page 99
Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect This register contains the apparent accumulated energy delivered into phase A/B/C or total. The register is the prod- uct of the ENR_CC and X.ESF registers. Byte 7 (MSByte unused) Byte 5 ...
Page 100
... The MAXQ3183 must have separate ground areas for the analog (AGND) and digital (DGND) portions, con- nected together at a single point. ...
Page 101
... Doing so reduces the susceptibility of the design to fast transient noise. Because the MAXQ3183 is designed for use in systems where high voltages are present, care must be taken to route all signal paths, both analog and digital, as far away as possible from the high-voltage components ...
Page 102
... Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2009 Maxim Integrated Products VOLTAGE SENSE R1 V0P R2 R1 V1P R2 R1 V2P R2 VCOMM VN CURRENT TRANSFORMER I0P R3 R3 I0N I1P R3 R3 I1N I2P R3 R3 I2N Maxim is a registered trademark of Maxim Integrated Products, Inc. Typical Application Circuit MAXQ3183 MASTER ...