LTC2400CS8#PBF Linear Technology, LTC2400CS8#PBF Datasheet - Page 26

• Manufacturer Part Number: LTC2400CS8#PBF
• Description: IC A/D CONV 24BIT MICRPWR 8-SOIC
• Manufacturer: Linear Technology

Specifications of LTC2400CS8#PBF

• Number Of Bits: 24
• Sampling Rate (per Second): 7.5
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LTC2400
TYPICAL APPLICATIONS
SYNCHRONIZATION OF MULTIPLE LTC2400s
Since the LTC2400’s absolute accuracy (total unadjusted
error) is 10ppm, applications utilizing multiple matched
ADCs are possible.
Simultaneous Sampling with Two LTC2400s
One such application is synchronizing multiple LTC2400s,
see Figure 27. The start of conversion is synchronized to
the rising edge of CS. In order to synchronize multiple
LTC2400s, CS is a common input to all the ADCs.
To prevent the converters from autostarting a new con-
version at the end of data output read, 31 or fewer SCK
clock signals are applied to the LTC2400 instead of 32 (the
32nd falling edge would start a conversion). The exact
timing and frequency for the SCK signal is not critical
since it is only shifting out the data. In this case, two
LTC2400’s simultaneously start and end their conversion
cycles under the external control of CS.
26
SDO1
SDO2
SCK1
SCK2
CS
U
CONTROLLER
Figure 27. Synchronous Conversion—Extendable
SDO1
SDO2
SCK2
SCK1
CS
31 OR LESS CLOCK CYCLES
V
V
V
GND
CC
REF
IN
LTC2400
#1
SDO
SCK
CS
F
O
Increasing the Output Rate Using Multiple LTC2400s
A second application uses multiple LTC2400s to increase
the effective output rate by 4 , see Figure 28. In this case,
four LTC2400s are interleaved under the control of sepa-
rate CS signals. This increases the effective output rate
from 7.5Hz to 30Hz (up to a maximum of 60Hz). Addition-
ally, the one-shot output spectrum is unfolded allowing
further digital signal processing of the conversion results.
SCK and SDO may be common to all four LTC2400s. The
four CS rising edges equally divide one LTC2400 conver-
sion cycle (7.5Hz for 60Hz notch frequency). In order to
synchronize the start of conversion to CS, 31 or less SCK
clock pulses must be applied to each ADC.
Both the synchronous and 4 output rate applications use
the external serial clock and single cycle operation with
reduced data output length (see Serial Interface Timing
Modes section and Figure 6). An external oscillator clock
is applied commonly to the F
order to synchronize the sampling times. Both circuits
may be extended to include more LTC2400s.
31 OR LESS CLOCK CYCLES
V
V
V
GND
CC
REF
IN
LTC2400
#2
SDO
SCK
CS
F
O
EXTERNAL OSCILLATOR
(153,600HZ)
V
(0.1V TO V
REF
O
pin of each LTC2400 in
CC
)
2400 F27